The AD9363 is a high performance, highly integrated RF agile
transceiver designed for use in 3G and 4G femtocell applications.
Its programmability and wideband capability make it ideal for a
broad range of transceiver applications. The device combines an
RF front end with a flexible mixed-signal baseband section and
integrated frequency synthesizers, simplifying design-in by
providing a configurable digital interface to a processor. The
AD9363 operates in the 325 MHz to 3.8 GHz range, covering
most licensed and unlicensed bands. Channel bandwidths from
less than 200 kHz to 20 MHz are supported.
The two independent direct conversion receivers have state-of-the-art
noise figure and linearity. Each Rx subsystem includes
independent automatic gain control (AGC), dc offset correction,
quadrature correction, and digital filtering, thereby eliminating
the need for these functions in the digital baseband. The AD9363
also has flexible manual gain modes that can be externally
controlled. Two high dynamic range ADCs per channel digitize
the received I and Q signals and pass them through configurable
decimation filters and 128-tap finite impulse response (FIR)
filters to produce a 12-bit output signal at the appropriate
sample rate.
The transmitters use a direct conversion architecture that achieves
high modulation accuracy with ultralow noise. This transmitter
design produces a best-in-class Tx EVM of −34 dB, allowing
significant system margin for the external power amplifier (PA)
selection. The on-board Tx power monitor can be used as a
power detector, enabling highly accurate Tx power
measurements.
The fully integrated phase-locked loops (PLLs) provide low
power fractional N frequency synthesis for all receive and
transmit channels. Channel isolation, demanded by FDD
systems, is integrated into the design. All voltage controlled
oscillators (VCOs) and loop filter components are integrated.
The core of the AD9363 can be powered directly from a 1.3 V
regulator. The IC is controlled via a standard 4-wire serial port
and four real-time I/O control pins. Comprehensive power-down
modes are included to minimize power consumption during
normal use. The AD9363 is packaged in a 10 mm × 10 mm,
144-ball chip scale package ball grid array (CSP_BGA).
Applications
- 3G enterprise femtocell base stations
- 4G femtocell base stations
- Wireless video transmission
Download the complete design file resource package including user guides.
The ADRV9363-W/PCBZ evaluation board will be available in June 2017. In the meantime you can use the AD-FMCOMMS3 for evaluation. The ADRV9363 will be in the same form factor and use the same FMC interface as AD-FMCOMMS3. It will be supported by the same carrier platforms and same software and tools. Limited by the functionality of AD9363, the ADRV9363 only supports 325MHz to 3.8GHz tuning range and up to 20MHz channel bandwidth. In addition, the ADRV9363 will use an on-board oscillator for external reference clock and it doesn’t offer EXT_LO test point.
