AD9641
RECOMMENDED FOR NEW DESIGNS14-Bit, 80 MSPS/155 MSPS, 1.8 V Serial Output Analog-to-Digital Converter (ADC)
- Part Models
- 4
- 1ku List Price
- Starting From $33.83
Part Details
- JESD204A coded serial digital outputs
- SNR = 73.7 dBFS @70 MHz and 80MSPS
- SNR = 72.8 dBFS @70 MHz and 155MSPS
- SFDR = 94 dBc @ 70 MHz and 80 MSPS
- SFDR = 90 dBc @ 70 MHz and 155 MSPS
- Low power: 238 mW @ 80 MSPS 1.8 V supply operation
- Low power: 238 mW @ 80 MSPS, 313mW at 155 MSPS
- 1.8 V supply operation
- Integer 1-to-8 input clock divider
- IF sampling frequencies to 250 MHz
- Please see data sheet for additional features
The AD9641 is a 14-bit, 80 MSPS/155 MSPS analog-to-digital converter (ADC) with a high speed serial output interface. The AD9641 is designed to support communications applications where high performance, combined with low cost, small size, and versatility, is desired. The JESD204A high speed serial interface reduces board routing requirements and lowers pin count requirements for the receiving device.
The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. The ADC features wide bandwidth, differential sample-and-hold, analog input amplifiers that support a variety of user-selectable input ranges. An integrated voltage reference eases the design considerations. A duty cycle stabilizer (DCS) is provided to compensate for variations in the ADC clock duty cycle, allowing the converter to maintain excellent performance.
The ADC output data is routed directly to the JESD204A serial output port. This output is at CML voltage levels. A CMOS or LVDS synchronization input (DSYNC) is provided.
The flexible power-down options allow significant power savings, when desired.
Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface.
The AD9641 is available in a 32-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.
APPLICATIONS
- Communications
- Diversity radio systems
- Multimode digital receivers (3G and 4G)
GSM, EDGE, W-CDMA, LTE,
CDMA2000, WiMAX, TD-SCDMA - Smart antenna systems
- General-purpose software radios
- Broadband data applications
- Ultrasound equipment
PRODUCT HIGHLIGHTS
- An on-chip PLL allows users to provide a single ADC sampling clock. The PLL multiplies the ADC sampling clock to produce the corresponding JESD204A data rate clock.
- The configurable JESD204A output block coded data rate supports up to 1.6 Gbps.
- A proprietary differential input maintains excellent SNR performance for input frequencies up to 250 MHz.
- Operation is from a single 1.8 V power supply.
- The standard serial port interface (SPI) supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), controlling the clock DCS, power-down, test modes, voltage reference mode, and serial output configuration.
Documentation
Data Sheet 1
User Guide 1
Application Note 8
Technical Articles 3
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
---|---|---|---|
AD9641BCPZ-155 | 32-Lead LFCSP (5mm x 5mm x 0.75mm w/ EP) | ||
AD9641BCPZ-80 | 32-Lead LFCSP (5mm x 5mm x 0.75mm w/ EP) | ||
AD9641BCPZRL7-155 | 32-Lead LFCSP (5mm x 5mm x 0.75mm w/ EP) | ||
AD9641BCPZRL7-80 | 32-Lead LFCSP (5mm x 5mm x 0.75mm w/ EP) |
This is the most up-to-date revision of the Data Sheet.
Hardware Ecosystem
Parts | Product Life Cycle | Description |
---|---|---|
Clock Distribution Devices 3 | ||
AD9513 | RECOMMENDED FOR NEW DESIGNS | 800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs |
AD9514 | RECOMMENDED FOR NEW DESIGNS | 1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs |
AD9515 | RECOMMENDED FOR NEW DESIGNS | 1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Two Outputs |
Clock Generation Devices 3 | ||
AD9510 | RECOMMENDED FOR NEW DESIGNS | 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs |
AD9511 | RECOMMENDED FOR NEW DESIGNS | 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs |
AD9512 | RECOMMENDED FOR NEW DESIGNS | 1.2 GHz Clock Distribution IC, Two 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs |
Digital Control VGAs 2 | ||
AD8370 | PRODUCTION | 750 MHz Digitally Controlled Variable Gain Amplifier |
AD8375 | PRODUCTION | Ultralow Distortion IF VGA |
Fully Differential Amplifiers 2 | ||
ADL5561 | RECOMMENDED FOR NEW DESIGNS |
2.9 GHz Ultralow Distortion RF/IF Differential Amplifier |
ADL5562 | RECOMMENDED FOR NEW DESIGNS | 3.3 GHz Ultralow Distortion RF/IF Differential Amplifier |
Single-Ended to Differential Amplifiers 2 | ||
ADA4937-1 | RECOMMENDED FOR NEW DESIGNS | Ultralow Distortion Differential ADC Driver (Single) |
ADA4938-1 | RECOMMENDED FOR NEW DESIGNS | Ultralow Distortion Differential ADC Driver (Single) |
Tools & Simulations
Virtual Eval - BETA
Virtual Eval is a web application to assist designers in product evaluation of ADCs, DACs, and other ADI products. Using detailed models on Analog’s servers, Virtual Eval simulates crucial part performance characteristics within seconds. Configure operating conditions such as input tones and external jitter, as well as device features like gain or digital down-conversion. Performance characteristics include noise, distortion, and resolution, FFTs, timing diagrams, response plots, and more.
Open ToolS-Parameter 2
Visual Analog
For designers who are selecting or evaluating high speed ADCs, VisualAnalog™ is a software package that combines a powerful set of simulation and data analysis tools with a user-friendly graphical interface.
Open ToolADIsimRF
ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.
Open ToolAD9641 Simulink ADIsimADC Model
Open ToolEvaluation Kits
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