AD9512
RECOMMENDED FOR NEW DESIGNS1.2 GHz Clock Distribution IC, Two 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs
- Part Models
- 4
- 1ku List Price
- Starting From $8.32
Part Details
- Two 1.6 GHz, differential clock inputs
- 5 programmable dividers, 1 to 32, all integers
- Phase select for output-to-output coarse delay adjust
- Three independent 1.2 GHz LVPECL outputs
- Additive output jitter , 225 fs RMS
- Two independent 800 MHz/250 MHz LVDS/CMOS outputs
- Additive output jitter, 275 fs RMS
- Fine delay adjust on one output, 5-bit delay words
- 4-wire or 3-wire serial control port
- Space-saving 48-lead LFCSP
AD9512-EP supports defense and aerospace applications (AQEC standard)
- Download AD9512-EP data sheet (pdf)
- Military temperature range (−55°C to +85°C)
- Controlled manufacturing baseline
- One assembly/test site
- One fabrication site
- Enhanced product change notification
- Qualification data available on request
- V62/12656 DSCC Drawing Number
The AD9512 provides a multi-output clock distribution function for input signals up to 1.6 GHz. The design emphasizes low jitter and low phase noise in order to maximize data converter clocking performance.
Three independent LVPECL and two LVDS clock outputs operate to 1.2 GHz and 800 MHz respectively. Optional CMOS clock outputs available to 250 MHz. Each output has a programmable divider, which may be bypassed or set to divide by any integer up to 32.
Each divider allows the user to change the phase of one clock output relative to another clock output. This phase select functions as a coarse timing adjustment. One output also features a programmable delay element with a user-selected, fullscale range to 10 ns. This fine tuning delay block is programmed with a 5-bit word, which gives the user 32 possible delays from which to choose.
The AD9512 is ideally suited for data converter clocking applications where maximum converter performance is achieved with sub-picosecond jitter encode signals.
The AD9512 is available in a 48-lead LFCSP and is specified from -40°C to +85°C. The part may be run from a single 3.3 V supply.
Applications
- Low jitter, low phase noise clock distribution
- Clocking high speed ADCs, DACs, DDS, DDC, DUC, MxFE™ Converters
- Wireless infrastructure transceivers
- High performance instrumentation
- Broadband infrastructure
Documentation
Data Sheet 3
Application Note 9
Technical Articles 6
Evaluation Design File 3
Frequently Asked Question 1
Circuit Note 2
Webcast 1
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
---|---|---|---|
AD9512BCPZ | 48-Lead LFCSP (7mm x 7mm x 0.85mm w/ EP) | ||
AD9512BCPZ-REEL7 | 48-Lead LFCSP (7mm x 7mm x 0.85mm w/ EP) | ||
AD9512UCPZ-EP | 48-Lead LFCSP (7mm x 7mm x 0.75mm w/ EP) | ||
AD9512UCPZ-EP-R7 | 48-Lead LFCSP (7mm x 7mm x 0.75mm w/ EP) |
Part Models | Product Lifecycle | PCN |
---|---|---|
Jun 9, 2021 - 20_0126 Conversion of Select Sizes LFCSP Products from Punched to Sawn and Transfer of Assembly Site to ASE Korea |
||
AD9512BCPZ | PRODUCTION | |
AD9512BCPZ-REEL7 | PRODUCTION | |
Sep 13, 2017 - 16_0077 CANCELLED: Conversion of Select 4x4, 5x5, 6x6 and 7x7mm LFCSP Package Outlines from Punch to Sawn and Transfer of Assembly Site to ASE Korea. |
||
AD9512BCPZ | PRODUCTION | |
AD9512BCPZ-REEL7 | PRODUCTION | |
Feb 6, 2017 - 16_0225 Addition of ASE Korea as an Alternate Assembly Site for Select LFCSP Products. |
||
AD9512UCPZ-EP | PRODUCTION | |
AD9512UCPZ-EP-R7 | PRODUCTION | |
Jun 19, 2014 - 13_0247 Assembly Transfer of Select 3x2, 4x4, 5x5, 6x6 and 7x7 mm LFCSP Pre-plated Leadframe Products to STATS ChipPAC China |
||
AD9512UCPZ-EP | PRODUCTION | |
AD9512UCPZ-EP-R7 | PRODUCTION |
This is the most up-to-date revision of the Data Sheet.
Tools & Simulations
AD9512 IBIS Models 1
ADIsimCLK Design and Evaluation Software
ADIsimCLK is the design tool developed specifically for Analog Devices' range of ultra-low jitter clock distribution and clock generation products. Whether your application is in wireless infrastructure, instrumentation, networking, broadband, ATE or other areas demanding predictable clock performance, ADIsimCLK will enable you to rapidly develop, evaluate and optimize your design.
Open Tool