AD9609
PRODUCTION10-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Analog-to-Digital Converter
- Part Models
- 8
- 1ku List Price
- Starting From $4.63
Part Details
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The AD9609 is a monolithic, single channel 1.8 V supply, 10-bit, 20/40/65/80 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference.
The product uses multistage differential pipeline architecture with output error correction logic to provide 10-bit accuracy at 80 MSPS data rates and to guarantee no missing codes over the full operating temperature range.
The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).
A differential clock input with selectable internal 1 to 8 divide ratio controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.
The digital output data is presented in offset binary, gray code, or twos complement format. A data output clock (DCO) is provided to ensure proper latch timing with receiving logic. Both 1.8 V and 3.3 V CMOS levels are supported.
The AD9609 is available in a 32-lead RoHS-compliant LFCSP and is specified over the industrial temperature range (−40°C to +85°C).
APPLICATIONS
- Communications
- Diversity radio systems
- Multimode digital receivers
- GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA
- Smart antenna systems
- Battery-powered instruments
- Handheld scope meters
- Portable medical imaging
- Ultrasound
- Radar/LIDAR
- PET/SPECT imaging
PRODUCT HIGHLIGHTS
1. The AD9609 operates from a single 1.8 V analog power
supply and features a separate digital output driver supply
to accommodate 1.8 V to 3.3 V logic families.
2. The sample-and-hold circuit maintains excellent performance
for input frequencies up to 200 MHz and is designed for low
cost, low power, and ease of use.
3. A standard serial port interface supports various product
features and functions, such as data output formatting,
internal clock divider, power-down, DCO and data output
(D9 to D0) timing and offset adjustments, and voltage
reference modes.
4. The AD9609 is packaged in a 32-lead RoHS compliant
LFCSP that is pin compatible with the AD9629 12-bit ADC
and the AD9649 14-bit ADC, enabling a simple migration
path between 10-bit and 14-bit converters sampling from
20 MSPS to 80 MSPS.
Documentation
Data Sheet 1
User Guide 1
Application Note 8
Technical Articles 2
Evaluation Design File 2
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| AD9609BCPZ-20 | 32-Lead LFCSP (5mm x 5mm x 0.85mm w/ EP) | ||
| AD9609BCPZ-40 | 32-Lead LFCSP (5mm x 5mm x 0.85mm w/ EP) | ||
| AD9609BCPZ-65 | 32-Lead LFCSP (5mm x 5mm x 0.85mm w/ EP) | ||
| AD9609BCPZ-80 | 32-Lead LFCSP (5mm x 5mm x 0.85mm w/ EP) | ||
| AD9609BCPZRL7-20 | 32-Lead LFCSP (5mm x 5mm x 0.85mm w/ EP) | ||
| AD9609BCPZRL7-40 | 32-Lead LFCSP (5mm x 5mm x 0.85mm w/ EP) | ||
| AD9609BCPZRL7-65 | 32-Lead LFCSP (5mm x 5mm x 0.85mm w/ EP) | ||
| AD9609BCPZRL7-80 | 32-Lead LFCSP (5mm x 5mm x 0.85mm w/ EP) |
| Part Models | Product Lifecycle | PCN |
|---|---|---|
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Feb 1, 2024 - 24_0009 Qualification of alternative Wafer Fab for TSMC 0.18um Mixed Signal CMOS Process |
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| AD9609BCPZ-20 | PRODUCTION | |
| AD9609BCPZ-40 | PRODUCTION | |
| AD9609BCPZ-65 | PRODUCTION | |
| AD9609BCPZ-80 | PRODUCTION | |
| AD9609BCPZRL7-20 | PRODUCTION | |
| AD9609BCPZRL7-40 | PRODUCTION | |
| AD9609BCPZRL7-65 | PRODUCTION | |
| AD9609BCPZRL7-80 | PRODUCTION | |
|
Mar 13, 2017 - 17_0035 Power Down Sequence and DRVDD Voltage Restriction for AD9649, AD9629 and AD9609. |
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| AD9609BCPZ-20 | PRODUCTION | |
| AD9609BCPZ-40 | PRODUCTION | |
| AD9609BCPZ-65 | PRODUCTION | |
| AD9609BCPZ-80 | PRODUCTION | |
| AD9609BCPZRL7-20 | PRODUCTION | |
| AD9609BCPZRL7-40 | PRODUCTION | |
| AD9609BCPZRL7-65 | PRODUCTION | |
| AD9609BCPZRL7-80 | PRODUCTION | |
|
Nov 10, 2014 - 14_0047 Conversion of 5x5mm body Size LFCSP Package Outlines from Punch to Sawn and Transfer of Assembly Site to Amkor Philippines. |
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| AD9609BCPZ-20 | PRODUCTION | |
| AD9609BCPZ-40 | PRODUCTION | |
| AD9609BCPZ-65 | PRODUCTION | |
| AD9609BCPZ-80 | PRODUCTION | |
| AD9609BCPZRL7-20 | PRODUCTION | |
| AD9609BCPZRL7-40 | PRODUCTION | |
| AD9609BCPZRL7-65 | PRODUCTION | |
| AD9609BCPZRL7-80 | PRODUCTION | |
This is the most up-to-date revision of the Data Sheet.
Hardware Ecosystem
| Parts | Product Life Cycle | Description |
|---|---|---|
| Clock Distribution Devices 3 | ||
| AD9513 | RECOMMENDED FOR NEW DESIGNS | 800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs |
| AD9514 | RECOMMENDED FOR NEW DESIGNS | 1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs |
| AD9515 | RECOMMENDED FOR NEW DESIGNS | 1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Two Outputs |
| Clock Generation Devices 3 | ||
| AD9510 | RECOMMENDED FOR NEW DESIGNS | 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs |
| AD9511 | RECOMMENDED FOR NEW DESIGNS | 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs |
| AD9512 | RECOMMENDED FOR NEW DESIGNS | 1.2 GHz Clock Distribution IC, Two 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs |
| Digital Control VGAs 2 | ||
| AD8370 | PRODUCTION | 750 MHz Digitally Controlled Variable Gain Amplifier |
| AD8375 | PRODUCTION | Ultralow Distortion IF VGA |
| Fully Differential Amplifiers 2 | ||
| ADL5561 | RECOMMENDED FOR NEW DESIGNS |
2.9 GHz Ultralow Distortion RF/IF Differential Amplifier |
| ADL5562 | RECOMMENDED FOR NEW DESIGNS | 3.3 GHz Ultralow Distortion RF/IF Differential Amplifier |
| Single-Ended to Differential Amplifiers 2 | ||
| ADA4937-1 | RECOMMENDED FOR NEW DESIGNS | Ultralow Distortion Differential ADC Driver (Single) |
| ADA4938-1 | RECOMMENDED FOR NEW DESIGNS | Ultralow Distortion Differential ADC Driver (Single) |
Tools & Simulations
Virtual Eval - BETA
Virtual Eval is a web application to assist designers in product evaluation of ADCs, DACs, and other ADI products. Using detailed models on Analog’s servers, Virtual Eval simulates crucial part performance characteristics within seconds. Configure operating conditions such as input tones and external jitter, as well as device features like gain or digital down-conversion. Performance characteristics include noise, distortion, and resolution, FFTs, timing diagrams, response plots, and more.
Open ToolS-Parameter 1
AD9609 IBIS Model 1
Visual Analog
For designers who are selecting or evaluating high speed ADCs, VisualAnalog™ is a software package that combines a powerful set of simulation and data analysis tools with a user-friendly graphical interface.
Open ToolAD9609 Simulink ADIsimADC Model
Open ToolEvaluation Kits
FPGA-Based Data Capture Kit
Resources
Software
AD9609 Evaluation Board