AD9088

PRE-RELEASE

Apollo MxFE Octal, 16-Bit, 16 GSPS RF DAC and Octal, 12-Bit, 8 GSPS RF ADC

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    Part Details

    • Flexible reconfigurable common platform design
      • 8 DACs and 8 ADCs (8D8A)
      • Usable RF analog bandwidth to 16 GHz
      • Maximum DAC/ADC sample rate up to 16 GSPS/8 GSPS
    • DAC to ADC sample rate ratios of 1 and 2
      • Clocking
      • On-chip PLL (7 GHz to 14 GHz VCO)
    • External RFCLK input up to 8 GHz
      • Multichip synchronization
    • Single-ended (SE) ADC inputs
      • 50 Ω input impedance
      • Integrated on-chip wide bandwidth balun
    • ADC AC performance at 8 GSPS
      • Full-scale input voltage: 650 mV p-p/0.3 dBm
      • Noise density: −148 dBFS/Hz at −20 dBFS at 2 GHz
      • HD2/HD3: −70 dBFS/−75 dBFS at −7 dBFS at 2 GHz
      • IMD3: −75 dBFS at −13 dBFS/tone at 2 GHz
    • DAC AC performance at 16 GSPS
      • Full-scale output power: −1.1 dBm at 2 GHz
      • IMD3: −7 5 dBc at −13 dBFS/tone at 2 GHz
      • NSD (shuffling disabled): −163 dBFS/Hz at −1 dBFS at 2 GHz
      • NSD (shuffling enabled): −158 dBFS/Hz at −1 dBFS at 2 GHz
    • Versatile digital features
      • Supports real or complex digital data (8-, 12-, 16-bit)
      • Configurable DDC and DUC
      • 16 fine complex DUCs and 8 coarse complex DUCs
      • 16 fine complex DDCs and 8 coarse complex DDCs
      • Option to bypass fine and coarse DUC/DDC
      • DUC/DDC alias rejection
      • 85 dB for interpolation filters
      • 100 dB for decimation filters
    • Programmable FIR filters for transmit/receive.
    • Dynamic configuration through SPI/HSCI/GPIO
    • Interface
      • SPI
      • High-Speed Control Interface
      • JESD204B/JESD204C: 20 Gbps/32.5 Gbps
    • 24 lanes for Rx, 24 lanes for Tx
    • Signal monitor for slow AGC control
    • Auxiliary features
      • Power amplifier downstream protection circuitry
      • On-chip temperature monitoring unit
      • TDD power savings option
    • Total power consumption dependent on device configuration: 14 W to 20 W typical
    • 24 mm × 26 mm, 889-ball BGA with 0.8 mm pitch
    • Operating junction temperature (TJ): −40°C to +110°C
    AD9088
    Apollo MxFE Octal, 16-Bit, 16 GSPS RF DAC and Octal, 12-Bit, 8 GSPS RF ADC
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    Documentation

    Data Sheet 1

    User Guide 1

    Technical Articles 3

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    Software Resources

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    Hardware Ecosystem

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    Tools & Simulations

    AD9084/AD9088 AMI Model

    Design file package for the AD9084 and AD9088.

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    Evaluation Kits

    eval board
    schematic 1
    schematic 2
    schematic 3
    ADS10-V1EBZ

    ADS10-V1EBZ Evaluation Board

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    Features and Benefits

    Xilinx Virtex Ultrascale+ XCVU35P-3FSHV2892E FPGA.

    • One (1) FMC+ connector.
    • Twenty (24) 32.75Gbps transceivers supported by one (1) FMC+ connector.
    • On-board HBM DRAM in FPGA.
    • Simple USB 3.0 port interface.

    Product Details

    When connected to a specified Analog Devices high speed converter evaluation board, the ADS10-V1EBZ works as a data capture/transmit board. Designed to support the highest speed JESD204B/C data converters, the FPGA on the ADS10-V1EBZ acts as the data receiver for high speed ADC's, and as the transmitter for high speed DAC's.

    eval board
    schematic 4
    schematic 5
    schematic 6
    EVAL-AD9084

    Evaluating the AD9084 Apollo MxFE Quad, 16-Bit 28GSPS RF DAC and Quad 12-Bit, 20GSPS RF ADC

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    Features and Benefits

    • Fully functional evaluation board for the AD9084 direct sub8GHz and X-band transceiver
    • PC software for control with Analysis | Control | Evaluate (ACE) Software or the Python Application (pyApp)

    Product Details

    This user guide describes the AD9084 evaluation platform and the necessary hardware and software configurations to evaluate the mixed-signal front-end RF transceiver (MxFE®).

    The ACE Software allows the user to quickly evaluate the Apollo MxFE under different configurations, collectively known as use cases, to process and play an analog signal out of the digital-toanalog converter (DAC) or to capture a signal converted by the analog-to-digital converter (ADC). The signal samples are transferred across JESD204B or JESD204C links between the Apollo MxFE and the field-programmable gate array (FPGA) located on the ADS10-V1EBZ data capture and transmit board. The captured ADC samples can be downloaded to the host PC for display and analysis in the ACE Software or stored as vectors of the samples (a signal of a finite length stored as a list of samples) for processing with other software. The ACE Software also allows the user to generate common signal vectors or load custom vectors that can be uploaded to the ADS10-V1EBZ and then transmitted to the Apollo MxFE, processed by its digital signal processing (DSP), and reconstructed out of the DAC into a spectrum analyzer or other test equipment.

    From a software perspective, the ACE Software interacts with the ADS10-V1EBZ across an remote procedure call (RPC) server hosted on the MicroZed mezzanine board mounted on the ADS10- V1EBZ. To control the AD9084 and other devices on the evaluation board, both ACE and the PyApp make requests to the RPC server. The server communicates with a precompiled version of the application programming interface (API) using a set of dynamic link libraries (DLLs) that are included with the software package. The MicroZed runs Ubuntu, a Linux distribution (distro), from a bootable microSD card supplied with the AD9084-FMCA-EBZ evaluation board.

    Please see the User Guide for the full description.
    ADS10-V1EBZ
    ADS10-V1EBZ Evaluation Board
    EVAL-AD9084
    Evaluating the AD9084 Apollo MxFE Quad, 16-Bit 28GSPS RF DAC and Quad 12-Bit, 20GSPS RF ADC

    Latest Discussions

    1 Years Ago
    Apollo MxFE is an incredibly impressive IC which seems to show state-of-the-art performance. Where can I get some more information?
    View related discussion on EngineerZone®

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