Demonstration circuit 3211A features the LTM4709, a triple 3A, ultralow noise, high PSRR, and ultrafast μModule® linear regulator with a configurable output array. The input voltage (VINn) range is from 0.6V to 5.5V. There are jumpers to set a 3-bit trilevel code that determines the output voltage (VOUTn) at preprogrammed levels that range from 0.5V to 4.2V. The maximum output current per channel is 3A. The DC3211A requires an external BIAS voltage (VBIASn) at least 1.2V higher than VOUTn and between 2.375V and 5.5V.
The LTM4709 of the DC3211A requires few external components, therefore, simplifying the circuit design and significantly reducing solution size. External component choice and carefully printed circuit board (PCB) design help optimize noise, Power Supply Rejection Ratio (PSRR), load transient response, and VOUTn regulation performance. The LTM4709 only requires ceramic capacitors for the power input and the power output. The 22μF capacitor at the circuit output was chosen for high frequency PSRR performance and to minimize VOUTn deviation during load transients.
The capacitor that bypasses the VINn power for the LTM4709 and the corresponding VINn PCB layout can affect PSRR (see the Best PSRR Performance: PCB Layout for Input Traces section for additional information). The DC3211A decouples the VINn power with a 4.7μF capacitor (see the LTM4709 data sheet for the minimum capacitor value required for VINn). Note that an optional bulk 220μF tantalum polymer capacitor further reduces VINn variation during load transients and reduces input voltage ringing that can be caused by inductive input power leads.
The LTM4709 has a precision current monitor that provides accurate current monitoring for the energy management system and current limit. An IMONn terminal is available for the current monitoring of each channel. The IMONn voltage is the product of the resistance that programs the current limit and the IMONn pin current, which is 1/3000 of the output current. By default, the DC3211A has a 3.3A current limit per channel with IMONRn tied to GND. However, custom current limit levels can be programmed by floating IMONRn and connecting a resistor from IMONn to GND. The externally programmed current limit is triggered when the IMONn voltage is 1V.
ENn jumpers (JP1, JP2, JP3) are available on the DC3211A to either connect each channel’s ENn pin to VBIASn to turn the output on or to ground to disable the output. There is a PGn terminal for each channel that is pulled up to VBIASn by a 100k resistor when PGRn is connected to BIAS. PGn is pulled down by an open-drain, n-channel metal-oxide semiconductor (nMOS) output for indication of regulator output status, and other fault modes. The voltage input-to-output control (VIOC1) terminal allows connections for automatically regulating the difference between the input voltage and output voltage of the LTM4709 to be a fixed value.
The LTM4709 data sheet must be read in conjunction with this demo manual before working on or modifying demonstration circuit DC3211A.