AD9084

PRE-RELEASE

Apollo MxFE Quad, 16-Bit, 28 GSPS RF DAC and Quad, 12-Bit, 20 GSPS RF ADC

Data Sheet (Rev. PrA) Product Selection Table

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Part Details

Flexible reconfigurable common platform design
- 4 DACs and 4 ADCs (4D4A)
- Usable RF Analog bandwidth up to 18 GHz
- Maximum DAC/ADC sample rate up to 28 GSPS/20 GSPS
DAC to ADC sample rate ratios of 1 and 2
- Clocking
- On-chip PLL (7 GHz to 14 GHz)
External RFCLK input up to 20 GHz
Multichip synchronization via subclass1
Single-ended (SE) or differential (DIFF) ADC inputs
- Two separate versions, both 50 Ω input impedance
- Single-ended version with on-chip wide bandwidth balun
Differential ADC AC performance at 20 GSPS
- Full-scale input voltage: 500 mV p-p/−2 dBm
- Noise density: −150 dBFS/Hz at −20 dBFS at 2 GHz
- HD2/HD3: −65 dBFS/−70 dBFS at −7 dBFS at 2 GHz
- IMD3: −75 dBFS at – 13 dBFS/tone at 2 GHz
DAC AC performance at 28 GSPS
- Full-scale output power: −2.1 dBm at 2 GHz
- IMD3: −75 dBc at – 13 dBFS/tone at 2 GHz to 10 GHz
- NSD (shuffling disabled): −164 dBFS/Hz at 0 dBFS at 2 GHz
Versatile digital features
- Supports real or complex digital data (8-, 12-, 16-bit)
- Configurable DDC and DUC
- 8 fine complex DUCs and 4 coarse complex DUCs
- 8 fine complex DDCs and 4 coarse complex DDCs
- Option to bypass fine and coarse DUC/DDC
- DUC/DDC alias rejection
- 85 dB for interpolation filters
- 100 dB for decimation filters
- Fractional sample rate converter (FSRC)

Programmable FIR filters for transmit/receive
Multiple loopback (ADC to DAC) supported
- ~45 ns without DSP path
Dynamic configuration through SPI/HSCI/GPIO
Spectrum sniffer/monitor
Interfaces
- SPI
- High-Speed Control Interface (HSCI)
- JESD204B/JESD204C: 20 Gbps/32.5 Gbps
24 lanes for Rx, 24 lanes for Tx
Receive AGC support
- Fast detect with low latency for fast AGC control
- Signal monitor for slow AGC control
Auxiliary features
- Power amplifier downstream protection circuitry
- On-chip temperature monitoring unit
- TDD power savings option
Total power consumption range dependent on device configuration: 20 W to 30 W
24 mm × 26 mm, 899-ball BGA with 0.8 mm pitch
Operating junction temperature (T_J): −40°C to +110°C

Documentation

Data Sheet 1

AD9084: Apollo MxFE Quad, 16-Bit, 28 GSPS RF DAC and Quad, 12-Bit, 20 GSPS RF ADC Preliminary Data Sheet (Rev.PrA) 06/14/2023

Technical Articles 7

How to Select the Best ADC for Radar Phased Array Applications—Part 1 06/12/2023

How Do We Ensure Zero Failures During Qualification of Highly Complex Integrated Circuits 06/17/2024

20 GHz Direct Sampling: All in One Nyquist—Part 1: Challenges and Approaches 06/19/2024

How to Select the Best ADC for Radar Phased Array Applications - Part 2 06/15/2023

20 GHz Direct Sampling: All in One Nyquist—Part 2: Quadrature Interleaving 02/25/2025

This is the most up-to-date revision of the Data Sheet.

Software Resources

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Hardware Ecosystem

Parts	Product Life Cycle	Description
µModule Buck Regulators 2
LTM4702	RECOMMENDED FOR NEW DESIGNS	16V_IN, 8A Ultralow Noise Silent Switcher 3 μModule Regulator
LTM8074	RECOMMENDED FOR NEW DESIGNS	40V_IN, 1.2A Silent Switcher µModule Regulator
Clock Synchronization 1
ADF4030	RECOMMENDED FOR NEW DESIGNS	10-Channel Precision Synchronizer
Digital Control VGAs 2
ADL6331	RECOMMENDED FOR NEW DESIGNS	0.38 GHz to 15 GHz TxVGA

ADL6332	RECOMMENDED FOR NEW DESIGNS	0.38 GHz to 15 GHz RxVGA
Digital Power System Managers 1
LTC2977	RECOMMENDED FOR NEW DESIGNS	8-Channel PMBus Power System Manager Featuring Accurate Output Voltage Measurement
Fractional-N PLL 1
ADF4382	RECOMMENDED FOR NEW DESIGNS	Microwave Wideband Synthesizer with Integrated VCO
Negative Linear Regulators (LDO) 1
LT3094	RECOMMENDED FOR NEW DESIGNS	−20V, 500mA, Ultralow Noise, Ultrahigh PSRR Negative Linear Regulator
Phase Locked Loop with Integrated VCO 1
ADF4382A	RECOMMENDED FOR NEW DESIGNS	2.87GHz to 21GHz Fractional-N PLL/VCO for High Performance Converter Clocking Applications
Positive Linear Regulators (LDO) 1
LTM4709	RECOMMENDED FOR NEW DESIGNS	Triple 3A, Ultralow Noise, High PSRR, Ultrafast μModule Linear Regulator with Configurable Output Array
Ultralow Noise Regulators 1
LT8627SP	RECOMMENDED FOR NEW DESIGNS	18V/16A Step-Down Silent Switcher 3 with Ultralow Noise Reference

Tools & Simulations

Data Conversion Calculator

Calculate ENOB, SNR, SINAD, THD.

Open Tool

Frequency Folding Tool

This tool illustrates the aliasing effects of an input signal and its harmonics when digitized by an ADC. The user can select single tone or a modulated carrier input signal and can observe aliasing in up to 10 Nyquist zones.

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SNR/THD/SINAD Calculator

This calculator converts SNR, THD, and SINAD into ENOBs and noise. It also computes one of SNR, THD, or SINAD from the other two.

Open Tool

Clock & Timing Tools

Analog Devices provides design tools that work with our product portfolio to help engineers build critical clock and timing IC solutions for wired and wireless networks.

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Evaluation Kits

ADS10-V1EBZ Evaluation Board

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Features and Benefits

Xilinx Virtex Ultrascale+ XCVU35P-3FSHV2892E FPGA.

One (1) FMC+ connector.
Twenty (24) 32.75Gbps transceivers supported by one (1) FMC+ connector.
On-board HBM DRAM in FPGA.
Simple USB 3.0 port interface.

Product Details

When connected to a specified Analog Devices high speed converter evaluation board, the ADS10-V1EBZ works as a data capture/transmit board. Designed to support the highest speed JESD204B/C data converters, the FPGA on the ADS10-V1EBZ acts as the data receiver for high speed ADC's, and as the transmitter for high speed DAC's.

Resources

ADS10-V1EBZ User Guide
11/8/2023

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AD9084

Part Details

Documentation

Data Sheet 1

Technical Articles 7

Video 9

Webcast 1

Software Resources

Can't find the software or driver you need?

Hardware Ecosystem

Tools & Simulations

Data Conversion Calculator

Frequency Folding Tool

SNR/THD/SINAD Calculator

Clock & Timing Tools

Evaluation Kits

Features and Benefits

Product Details

Resources

Latest Discussions

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