CN0376

The AD7124-4 24-bit, Σ-Δ ADC with programmable gain array (PGA) and voltage reference provides the complete set of features to implement a flexible input capable of connection to either thermocouple or RTD sensors. Features include on-chip reference, PGA, excitation currents, bias voltage generator, and flexible filtering with enhanced 50 Hz and 60 Hz rejection options. The AD7124-4 is in a small 5 mm × 5 mm LFCSP package, making it ideal in channel-to-channel isolated designs where space is a premium. It also includes multiple diagnostic functions that are available to the user.

The ADuM5010 isolated dc-to-dc converter provides 3.3 V isolated power via integrated isoPower^® technology. The ADuM1441 isolates the serial peripheral interface (SPI) for the AD7124-4. The ADuM1441 micropower isolator consumes only 4.8 μA per channel when idle, resulting in an energy efficient solution.

The ADP2441 36 V, step-down, dc-to-dc regulator accepts an industrial standard 24 V supply, with wide tolerance on the input voltage. The ADP2441 steps the input voltage down to 3.3 V to power all of the controller-side circuitry.

System Overview

Channel-to-channel isolation is advantageous in automation systems, because faults on a particular input channel have no negative impact on other channels in the system. However, channel-to-channel isolated input modules present a significant design challenge in terms of complexity, space constraints, and system cost.

Both thermocouple or RTD inputs are commonly used in industrial automation systems; therefore, it is advantageous to design a temperature input module that handles both. This flexibility minimizes the design effort required for the two input module variants, and also offers flexibility to the module user.

The AD7124-4 significantly reduces the design complexity, providing a system-on-chip capable of performing all the necessary measurement functions for both thermocouple and RTD sensors.

Each channel of the circuit in Figure 1 measures only 27 mm by 50 mm, and this area can be further reduced by using both sides of the printed circuit board (PCB) for populating components. This small size is achieved because the AD7124-4 is in a small 5 mm × 5 mm LFCSP package and integrates almost all the required functions except the isolation and additional front-end filtering and protection. The isolation circuit consumes only 87 mm² for both the data and power isolation together, with a minimum combined width of 12.5 mm.

Terminal Connections

Figure 2 shows the terminal connections for each of the two input channels. These terminals correspond to P1 and P2 in the hardware (see Figure 1). The thermocouple as well as 2-, 3-, or 4-wire RTD connections are shown.

Input Filtering

As shown in Figure 3, the input common-mode noise filtering is provided by R1, C1 and R2, C2, and has a 50 kHz cutoff frequency, approximately. Differential noise filtering is provided by R1, R2, and C3 and has a 2.5 kHz cutoff frequency, approximately. It is particularly important to filter out any interference at the Σ-Δ modulator frequency (307 kHz in full-power mode). It is suggested to adjust the cutoff of these filters to meet system bandwidth requirements, with the cutoff of the common-mode filters being approximately 10× the cutoff of the differential filter.

Input Protection

To protect the input from an overvoltage condition, 3 kΩ resistors were placed on every input path to the AD7124-4. This resistor value limits the current from a 30 V dc overvoltage to less than 10 mA.

Consider the condition for 30 V connected between AIN+ and AIN−. Looking in from AIN+, the 30 V sees R1 (3 kΩ), followed by internal ESD protection diodes, followed by 3 kΩ looking out from AIN3 in parallel with 3 kΩ looking out from AIN4. Ignoring the internal ESD protection diodes, the total resistance seen between AIN+ and AIN− is 3 kΩ + 3 kΩ||3 kΩ = 4.5 kΩ. The current through the AD7124-4 is therefore limited to 30 V ÷ 4.5 kΩ = 6.7 mA.

RTD Input

The circuit in Figure 1 can be connected to 2-, 3-, or 4-wire RTDs. A resistance of up to 3.92 kΩ can be measured, making it suitable for Pt100 and Pt1000 RTDs. Current excitation is used, and the resistance measurement is a ratiometric measurement between the RTD and a precision 3.92 kΩ reference resistor (R_REF). As shown in Figure 3, the RTD measurement is made between AIN1 and AIN3, using REFIN1+ and REFIN1− as the reference input for the measurement. The excitation currents are set as follows:

• 2-wire mode: only the excitation on AIN0 is active, set at 250 μA.
• 3-wire mode: both the excitation currents on AIN0 and AIN4 are active, each set at 100 μA.
• 4-wire mode: only the excitation on AIN0 is active, set at 250 μA.

A high-side current sense technique is used. For low values of lead resistance to the RTD, this technique reduces the effect of any current mismatch in 3-wire mode. See the Circuit Note CN-0383 for more details on the 3-wire RTD configuration.

The reference resistor (R_REF) was chosen to be 3.92 kΩ, which allows measurement of a Pt1000 RTD up to 850°C (the RTD resistance is 3.9048 kΩ at 850°C). The value of R_REF must be selected based on the highest expected resistance for the RTD. The accuracy of the R_REF resistor has a direct impact on the measurement accuracy; therefore, a precision, low drift resistor must be used.

The excitation current must be set to 250 μA in 4-wire mode and 100 μA in 3-wire mode. For 4-wire mode, assume an RTD value of 3.92 kΩ. The excitation current coming from AIN0 passes through; R_REF + R_RTD + R_RETURN = 3.92 kΩ + 3.92 kΩ + 3 kΩ = 10.84 kΩ. Therefore, the voltage at AIN0 is equal to 250 μA × 10.84 kΩ = 2.71 V. The AD7124-4 specifies an output compliance of AVDD − 0.35 V on the excitation current outputs, which corresponds to 3.3 V – 0.35 V = 2.95 V. Because 2.95 V > 2.71 V, the 250 μA excitation current functions correctly even for the maximum RTD resistance.

See the Circuit Note CN-0381 for more details on the 4-wire RTD configuration.

In 3-wire mode, the lead compensation excitation current from AIN4 also flows through the 3 kΩ return resistor, producing an additional voltage at AIN0 of 250 μA × 3 kΩ = 0.75 V, thereby making the total voltage at AIN0 equal to 2.71 V + 0.75 V = 3.46 V, which violates the headroom requirement. Therefore, in 3-wire mode, the excitation currents must each be reduced to 100 μA to allow sufficient headroom.

The PGA gain can be used to increase the measurement resolution. For a Pt100 RTD, a gain of 8 is recommended (because Pt100 values are 10× smaller than Pt1000 values).

To achieve the desired accuracy, the RTD itself must be linearized in the software by the host controller, as described in the Circuit Note CN-0383.

Thermocouple Measurement

As shown in Figure 3, a thermocouple is connected between the AIN+ and AIN− terminals. The AIN4 pin provides a bias voltage for the thermocouple of 3.3 V ÷ 2 = 1.65 V. The thermocouple voltage is measured between AIN1 and AIN3, and because the thermocouple signals are very small, a PGA gain of 32 or 64 is typically recommended.

A 10 kΩ NTC thermistor is used for cold junction compensation. A reference voltage excitation, V_REF, is taken from REFOUT, and a precision, low-drift 5.62 kΩ resistor is placed in series to ground. The NTC resistance value can be calculated by

where:

V_NTC is the voltage measured between AIN1 and AIN3.
V_REF is the reference voltage from the AD7124-4 REFOUT.

Any temperature difference between the terminal block and the NTC temperature sensor directly impacts the resulting temperature reading for the thermocouple input. For this reason, the NTC thermistor must be placed as close to the terminal block as possible to maximize the thermal coupling.

To achieve the desired accuracy, the thermocouple and NTC must be linearized in the software by the host controller, as described in the Circuit Note CN-0384.

Diagnostics

The AD7124-4 provides a number of system level diagnostics, including

• Reference detection
• Overvoltage/undervoltage detection on the input
• CRC on SPI communications
• CRC on the memory map
• SPI read/write checks

These diagnostics allow a high level of fault coverage for the input channels.

Isolation

The data channels are isolated using the ADuM1441, a quad-channel, micropower isolator, resulting in an energy efficient solution. The ADuM1441 is in a small 5 mm × 6.2 mm, 16-lead QSOP package (30 mm²).

The ADuM5010, a complete isolated switching converter utilizing isoPower technology, provides power isolation for the circuit. The ADuM5010 is in a small 7.4 mm × 7.5 mm, 20-lead SSOP package (56.25 mm²).

Figure 4 shows details of the ADuM5010 circuitry. Ferrite beads are used on the secondary side of the supply to suppress any potential electromagnetic interference (EMI) emissions. The ferrite beads (Murata BLM18HK102SN1) are specifically chosen for their high impedance from 100 MHz to 1 GHz. Decoupling capacitors of 10 μF and 0.1 μF are also used. Both the ferrite beads and the capacitors use short traces to the ADuM5010 pins to minimize parasitic inductance and resistance.

The stitching capacitance is kept to a minimum size because the ferrite beads significantly reduce the emissions. The PCB area between the ADuM5010 supply, the GND pins, and the ferrite beads is kept clear of any ground planes or traces to minimize the capacitive coupling of any high frequency noise into the ground plane. See the AN-0971 Application Note for additional information on controlling radiated emissions from isoPower devices.

The R1 and R2 feedback resistors are chosen to select a 3.3 V output as per the ADuM5010 data sheet.

Power Consumption per Channel

The ADuM5010 typically consumes 3.3 mA from the controller-side supply. The efficiency of the ADuM5010 is only 27% at full load; therefore, minimizing the current drawn from field side significantly impacts the energy efficiency of the channel.

The AD7124-4 consumes ~994 μA (full power mode, gain = 32, TC bias, diagnostics and internal reference enabled). The AD7124-4 power can be significantly reduced by using the mid power or low power modes.

For the ADuM1441, the field side consumes a total of approximately 7.2 μA when idle and 552 μA when operating at 2 Mbps. If the interface is active 1/8th of the time, the power consumption for the ADuM1441 is (552 μA × 0.125) + (7.2 μA × 0.875) = 75.3 μA total.

The measured power consumption for an input channel operating in full power mode, gain = 32, internal reference, and TC bias enabled was 7.9 mA from the controller-side 3.3 V supply.

Power Supply Circuit

The evaluation board is powered by a 4.5 V to 36 V dc power supply and uses an on-board switching regulator to provide the 3.3 V supply to the system, as shown in Figure 5. The EVAL-SDP-CB1Z System Demonstration Platform (SDP) board provides a regulated 3.3 V for the digital interface.

The ADP2441 includes programmable soft start, regulated output voltage, switching frequency, and power good. These features are programmed externally via tiny resistors and capacitors. The ADP2441 also includes protection features, such as undervoltage lockout (UVLO) with hysteresis, output short-circuit protection, and thermal shutdown.

A 300 kHz switching frequency maximizes the efficiency of the ADP2441. Due to the high switching frequency of the ADP2441, using shielded ferrite core inductors is recommended because of their low core losses and low EMI.

In the Figure 5 circuit, the switching frequency is set to approximately 300 kHz using a 294 kΩ external resistor. The inductor value of 22 μH (Coilcraft LPS6235-223MLC) was chosen using the downloadable ADP2441 Buck Regulator Design Tool. This tool selects the best component values based on the required operating conditions (4.5 V to 36 V input, 3.3 V output, 1 A output current).A current of 1 A was selected to power additional circuits on the host controller side if required.

A complete set of documentation for the EVAL-CN0376-SDPZ circuit evaluation board including schematic, assembly, layout, Gerbers, and bill of materials is available at www.analog.com/CN0376-DesignSupport.

Testing Results

For detailed performance analysis of the thermocouple, 3-wire and 4-wire RTD circuits, see the Circuit Note CN-0381, Circuit Note CN-0383, and Circuit Note CN-0384 for in depth analysis and measurement results.

Figure 6 shows a histogram for the EVAL-CN0376-SDPZ using the 25 SPS post filter, with AIN+ shorted to AIN−, gain = 32, and TC bias enabled. The data corresponds to 17.85-bit noise-free code resolution.