ADR4520

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Ultra-Low-Noise, High-Accuracy 2.048V Voltage Reference

Part Models
4
1ku List Price
Starting From $2.89
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Part Details

  • Maximum temperature coefficient (TCVOUT):
    • 0.8 ppm/°C (D grade 0°C to 70°C)
    • 1 ppm/°C (C grade 0°C to 70°C)
    • 2 ppm/°C (B grade −40°C to +125°C)
    • 4 ppm/°C (A grade −40°C to +125°C)
  • Output noise (0.1 Hz to 10 Hz):
  • 1 μV p-p at VOUT of 2.048 V typical
  • Initial output voltage error:
    • B, C, D grade: ±0.02% (maximum)
  • Input voltage range: 3 V to 15 V
  • Operating temperature:
    • A grade and B grade: −40°C to +125°C
    • C grade and D grade: 0°C to +70°C
  • Output current: +10 mA source/−10 mA sink
  • Low quiescent current: 950 μA (maximum)
  • Low dropout voltage: 300 mV at 2 mA (VOUT ≥ 3 V)
  • 8-lead SOIC package and LCC package
  • AEC-Q100 qualified for automotive applications
  • Long-term drift: 8 ppm typical at 4500 hours
ADR4520
Ultra-Low-Noise, High-Accuracy 2.048V Voltage Reference
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Pin Configuration ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Pin Configuration ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Pin Configuration ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Pin Configuration
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Documentation

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Hardware Ecosystem

Parts Product Life Cycle Description
Positive Linear Regulators (LDO) 1
LT3040 RECOMMENDED FOR NEW DESIGNS 20V, 200mA, Ultralow Noise, Ultrahigh PSRR Precision DAC/Reference Buffer
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Tools & Simulations

LTspice 1


Models for the following parts are available in LTspice:

  • ADR4520

Signal Chain Designer - BETA

Signal Chain Designer is a web-based tool designed to create and simulate complex precision signal chains. See your circuit’s performance before you commit to your PCB: transfer function, noise, power consumption, input range, and DC error. Quickly experiment with different parts and architectures. Signal chains can be exported to LTspice for further analysis.

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LTspice

LTspice® is a powerful, fast and free simulation software, schematic capture and waveform viewer with enhancements and models for improving the simulation of analog circuits.


Reference Designs

Figure 1. CN0577 Simplified Block Diagram
CN0577 Circuits from the lab

Analog Front End and Digital Interface for Serial LVDS SAR ADCs

Features and Benefits

  • 18-Bit Resolution, 15 MSPS Data Acquisition System
  • Arbitrary Voltage Inputs Supported
  • All Clocking and Power Requirements are Onboard
  • FMC Connector for FPGA Interfacing
Figure 1. EVAL-CN0560-FMCZ Simplified Block Diagram
CN0560 Circuits from the lab

High Precision, Wide Bandwidth Current Measurement Signal Chain

Features and Benefits

  • Selectable Current Input Range with Protection
  • 10 A, 10mA, 10uA Measurement Range
  • Oversampling Enables up to 111 dB of Dynamic Range
CN0577
Analog Front End and Digital Interface for Serial LVDS SAR ADCs
Figure 1. CN0577 Simplified Block Diagram
EVAL-CN0577-FMCZ
EVAL-CN0577-FMCZ - Top View
EVAL-CN0577-FMCZ - Bottom View
CN0410
Programmable, 3-Channel LED Current Source Driver with isoSPI Repeater
EVAL-CN0410-ARDZ Evaluation Board
EVAL-CN0410-ARDZ Evaluation Board - Top View
EVAL-CN0410-ARDZ Evaluation Board - Bottom View
CN0560
High Precision, Wide Bandwidth Current Measurement Signal Chain
Figure 1. EVAL-CN0560-FMCZ Simplified Block Diagram
EVAL-CN0560-FMCZ Evaluation Board
EVAL-CN0560-FMCZ Evaluation Board - Top View
EVAL-CN0560-FMCZ Evaluation Board - Bottom View
CN-0560 and SDP-H1

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