AD9862

NOT RECOMMENDED FOR NEW DESIGNS

12-/14-Bit Mixed Signal Front-End (MxFE®) Processor for Broadband Communications

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Part Details

  • Dual 10-/12-Bit, 64 MSPS Sampling A/D Converter with Independent Reference, Input Buffers, Programmable Gain Amplifiers (PGA), Decimation Filters and a Digital Hilbert Block
  • Dual 12-/14-bit, 128 MSPS D/A Converter with Digital Hilbert and Interpolation Filters, Digital I/Q or Real-Signal Up-Converters, By passable Digital Up-Converters
  • A Versatile Mixed Signal Front-End Processor with Dual Receive and Dual Transmit Channels
  • Internal Clock Distribution Block including a Phase-Locked Loop and Timing Generation circuitry
  • Programmable Output Clocks, SPI Port, Programmable Sigma Delta Outputs, Auxiliary DAC outputs, Auxiliary ADC inputs
AD9862
12-/14-Bit Mixed Signal Front-End (MxFE®) Processor for Broadband Communications
AD9860/AD9862 Functional Block Diagram
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