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HMC832A

LAST TIME BUY

Fractional-N PLL with Integrated VCO 25 MHz to 3000 MHz

Part Models
2
1ku List Price
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Part Details

  • RF bandwidth: 25 MHz to 3000 MHz
  • 3.3 V supply
  • Maximum phase detector rate: 100 MHz
  • Ultralow phase noise
    • −110 dBc/Hz in band (typical), fO at 2000 MHz
  • Fractional figure of merit (FOM): −226 dBc/Hz
  • 24-bit step size, 3 Hz typical resolution
  • Exact frequency mode with 0 Hz frequency error
  • Fast frequency hopping
  • 40-lead, 6 mm × 6 mm LFCSP package: 36 mm2
HMC832A
Fractional-N PLL with Integrated VCO 25 MHz to 3000 MHz
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Software Resources

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Hardware Ecosystem

Parts Product Life Cycle Description
Clock Distribution Devices 1
HMC1031 LAST TIME BUY 0.1 MHz to 500 MHz Clock Generator with Integer N PLL
High Speed Comparators (<100ns Propagation Delay) 1
LTC6957 Low Phase Noise, Dual Output Buffer/Driver/Logic Converter
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Tools & Simulations

ADIsimFrequency Planner Tool

For those developers dealing with integer boundary spurs from Analog’s PLL synthesizers, the best solution is ADIsimFrequencyPlanner. The frequency planner quickly analyzes the PFD frequency for a user’s output requirements and then optimizes the frequency of each output to identify the highest contributing integer boundary spur performance.

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Evaluation Kits

EVAL-HMC832A
HMC832A Evaluation Board

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