ADRF6620
製造中止700 MHz to 2700 MHz RX Mixer with Integrated IF DGA, Fractional-N PLL, and VCO
製品の詳細
- Integrated fractional-N phase-locked loop (PLL)
- RF input frequency range: 700 MHz to 2700 MHz
- Internal local oscillator (LO) frequency range: 350 MHz to 2850 MHz
- Input P1dB: 17 dBm
- Output IP3: 45 dBm
- Single-pole four-throw (SP4T) RF input switch
- Digital step attenuator (DSA) range:
0 dB to 15 dB
- Integrated RF tunable balun allowing single-ended 50 Ω input
- Multicore integrated voltage controlled oscillator (VCO)
- Digitally programmable variable gain amplifier (DGA) −3 dB bandwidth: >600 MHz
- Balanced 150 Ω IF output impedance
- Programmable via 3-wire serial port interface (SPI)
- Single 5 V supply
The ADRF6620 is a highly integrated active mixer and synthesizer that is ideally suited for wireless receiver subsystems. The feature rich device consists of a high linearity broadband active mixer; an integrated fractional-N PLL; low phase noise, multicore VCO; and IF DGA. In addition, the ADRF6620 integrates a 4:1 RF switch, an on-chip tunable RF balun, programmable RF attenuator, and low dropout (LDO) regulators. This highly integrated device fits within a small 7 mm × 7 mm footprint.
The high isolation 4:1 RF switch and on-chip tunable RF balun enable the ADRF6620 to support four single-ended 50 Ω terminated RF inputs. A programmable attenuator ensures optimal RF input drive to the high linearity mixer core. The integrated DSA has an attenuation range of 0 dB to 15 dB with a step size of 1 dB.
The ADRF6620 offers two alternatives for generating the differential LO input signal: externally, via a high frequency, low phase noise LO signal, or internally, via the on-chip fractional-N PLL synthesizer. The integrated synthesizer enables continuous LO coverage from 350 MHz to 2850 MHz. The PLL reference input can support a wide frequency range because the divide and multiply blocks can be used to increase or decrease the reference frequency to the desired value before it is passed to the phase frequency detector (PFD).
The integrated high linearity DGA provides an additional gain range from 3 dB to 15 dB in steps of 0.5 dB for maximum flexibility in driving an analog-to-digital converter (ADC).
The ADRF6620 is fabricated using an advanced silicon-germanium BiCMOS process. It is available in a 48-lead, RoHS-compliant, 7 mm × 7 mm LFCSP package with an exposed pad. Performance is specified over the −40°C to +85°C temperature range.
APPLICATIONS
- Wireless receivers
- Digital predistortion (DPD) receivers
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ADIsimRF
ADIsimRFは使いやすいRFシグナル・チェーン計算ツールです。最大50段までのシグナル・チェーンについて、カスケード・ゲイン、ノイズ、歪み、消費電力を計算し、プロット、エクスポートが可能です。ADIsimRFには、アナログ・デバイセズのRFおよびミックスド・シグナル部品のデバイス・モデルの広範なデータ・ベースも含まれています。
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ADRF6620 Evaluation Board