LTC2208
PRODUCTION16-Bit, 130Msps ADC
- Part Models
- 4
- 1ku List Price
- Starting From $83.59
Part Details
- Sample Rate: 130Msps
- 78dBFS Noise Floor
- 100dB SFDR
- SFDR >83dB at 250MHz (1.5VP-P Input Range)
- PGA Front End (2.25VP-P or 1.5VP-P Input Range)
- 700MHz Full Power Bandwidth S/H
- Optional Internal Dither
- Optional Data Output Randomizer
- LVDS or CMOS Outputs
- Single 3.3V Supply
- Power Dissipation: 1.25W
- Clock Duty Cycle Stabilizer
- Pin Compatible 14-Bit Version 130Msps:
- LTC2208 (16-Bit)
- LTC2208-14 (14-Bit)
- 64-Pin (9mm × 9mm)QFN Package
The LTC2208 is a 130Msps, sampling 16-bit A/D converter designed for digitizing high frequency, wide dynamic range signals up to input frequencies of 700MHz. The input range of the ADC can be optimized with the PGA front end.
The LTC2208 is perfect for demanding communications applications, with AC performance that includes 78dBFS Noise Floor and 100dB spurious free dynamic range (SFDR). Ultra low jitter of 70fsRMS allows undersampling of high input frequencies with excellent noise performance. Maximum DC specs include ±4LSB INL, ±1LSB DNL (no missing codes) over temperature.
The digital output can be either differential LVDS or single-ended CMOS. There are two format options for the CMOS outputs: a single bus running at the full data rate or demultiplexed buses running at half data rate. A separate output power supply allows the CMOS output swing to range from 0.5V to 3.3V.
The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycle.
Bits | |
LTC2208-14 | 14 |
LTC2208-16 | 16 |
Applications
- Telecommunications
- Receivers
- Cellular Base Stations
- Spectrum Analysis
- Imaging Systems
- ATE
Documentation
Data Sheet 1
Reliability Data 1
User Guide 3
Design Note 1
Technical Articles 6
Product Selector Card 3
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
---|---|---|---|
LTC2208CUP#PBF | 64-Lead QFN (9mm x 9mm x 0.75mm w/ EP) | ||
LTC2208CUP#TRPBF | 64-Lead QFN (9mm x 9mm x 0.75mm w/ EP) | ||
LTC2208IUP#PBF | 64-Lead QFN (9mm x 9mm x 0.75mm w/ EP) | ||
LTC2208IUP#TRPBF | 64-Lead QFN (9mm x 9mm x 0.75mm w/ EP) |
This is the most up-to-date revision of the Data Sheet.
Software Resources
Evaluation Software 2
LinearLab Tools
A collection of Matlab and Python programs that provide direct access to Linear Technology’s data converter evaluation boards.
PScope
The PScope System is a USB-based product demonstration and data acquisition system for use with high performance ADCs and signal chain receiver family. PScope allows users to evaluate the SNR, SFDR, THD, as well as other key parameters, quickly and easily.
Can't find the software or driver you need?
Hardware Ecosystem
Parts | Product Life Cycle | Description |
---|---|---|
Clock Generation Devices 1 | ||
LTC6950 | Obsolete | 1.4GHz Low Phase Noise, Low Jitter PLL with Clock Distribution |
Fully Differential Amplifiers 2 | ||
LTC6401-20 | LAST TIME BUY | 1.3GHz Low Noise, Low Distortion Differential ADC Driver for 140MHz IF |
LTC6417 | LAST TIME BUY | 1.6GHz Low Noise High Linearity Differential Buffer/16-Bit ADC Driver with Fast Clamp |
Signal Chain µModule Receivers 1 | ||
LTM9001-A LTM9001-B |
16-Bit IF/Baseband Receiver Subsystem |