ADMV4420

RECOMMENDED FOR NEW DESIGNS

K Band Downconverter with Integrated Fractional-N PLL and VCO

Data Sheet (Rev. A) Product Selection Table
Part Models
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1ku List Price
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Part Details

  • RF front end with integrated RF balun and LNA
  • Double balanced, active mixer with high dynamic range IF amplifier
  • Fractional-N synthesizer with low phase noise, multicore VCO
  • 5 V supply operation with integrated LDO regulators
  • Output P1dB: 7 dBm
  • Output IP3: 16 dBm
  • Conversion gain: 36 dB
  • Noise figure: 7 dB
  • RF input frequency range: 16.95 GHz to 22.05 GHz
  • Internal LO frequency range: 16.35 GHz to 21.15 GHz
  • IF frequency range: 900 MHz to 2500 MHz
  • Single-ended 50 Ω input impedance and 75 Ω IF output impedance
  • Programmable via 4-wire SPI
  • 32-lead, 5 mm × 5 mm LFCSP
ADMV4420
K Band Downconverter with Integrated Fractional-N PLL and VCO
ADMV4420 Functional Block Diagram ADMV4420 Pin Configuration
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Documentation

Data Sheet 1

User Guide 1

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Software Resources

Device Drivers 1

Tools & Simulations

LTspice

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Evaluation Kits

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EVAL-ADMV4420

ADMV4420 Evaluation Board

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Features and Benefits

  • Full feature evaluation board for the ADMV4420
  • On-board SDP-S connector for SPI control
  • 5 V operation
  • ACE software interface for SPI control

Product Details

The ADMV4420 is a highly integrated, double balanced, active mixer with integrated fractional-N synthesizer, ideally suited for next generation K band satellite communications.

The radio frequency (RF) front end consists of an integrated RF balun and a low noise amplifier (LNA) for optimum 7 dB, single sideband noise figure while minimizing external components. Additionally, the high dynamic range intermediate frequency (IF) output amplifier provides a nominal conversion gain of 36 dB.

An integrated, low phase noise, fractional-N phase-locked loop (PLL) with a multicore voltage controlled oscillator (VCO) and an internal ×2 multiplier generates the necessary on-chip local oscillator (LO) signal for the double balanced mixer, eliminating the need for external frequency synthesis. The multicore VCO uses an internal autocalibration routine that allows the PLL to select the necessary settings and lock in approximately 400 μs.

The reference input to the PLL employs a differentially excited 50 MHz crystal oscillator on the evaluation board. Alternatively, the reference input can be driven by an external single-ended reference source. The phase frequency detector (PFD) comparison frequency of the PLL operates up to 50 MHz.

The ADMV4420 is fabricated on a silicon germanium (SiGe), bipolar complementary metal-oxide semiconductor (BiCMOS) process and is available in a 32-lead, RoHS compliant, 5 mm × 5 mm LFCSP with an exposed pad. The device is specified over the −40°C to +85°C temperature range on a 5 V power supply.
EVAL-ADMV4420
ADMV4420 Evaluation Board
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Latest Discussions

34 Weeks Ago
RE: ADMV4420 verification issue
35 Weeks Ago
Unreliable 3.3V SPI logic programming
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