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HMC705

RECOMMENDED FOR NEW DESIGNS

6.5 GHz Programmable Divider (N = 1 to 17) SMT

Data Sheet Product Selection Table

Part Models: 4
1ku List Price: price unavailable

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Part Details

Ultra Low SSB Phase Noise: -153 dBc/Hz @ 100 kHz Typ.
Programmable Divider (N = 1 - 17) Operating up to 6.5 GHz

24 Lead Plastic 4x4mm SMT Package: 16mm²

Part Models: 4
1ku List Price: price unavailable

Documentation

Data Sheet 1

HMC705 Data Sheet 04/22/2015

ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.

Part Model	Pin/Package Drawing	Documentation	CAD Symbols, Footprints, and 3D Models
HMC705LP4	24-Lead QFN (4mm x 4mm w/ EP)	Material Declaration Reliablity Data	Ultra Librarian SamacSys
HMC705LP4E	24-Lead QFN (4mm x 4mm w/ EP)	Material Declaration Reliablity Data	Ultra Librarian SamacSys
HMC705LP4ETR	24-Lead QFN (4mm x 4mm w/ EP)	Material Declaration Reliablity Data	Ultra Librarian SamacSys
HMC705LP4TR	24-Lead QFN (4mm x 4mm w/ EP)	Material Declaration Reliablity Data	Ultra Librarian SamacSys

Part Models	Product Lifecycle	PCN

Apr 19, 2022 - 22_0048 Addition of ASE Korea as an Alternate Assembly Site for Select LFCSP Products
		PCN22_0048_Form Material_Report Qualification Results Summary Detailed Change Description
HMC705LP4E	PRODUCTION
HMC705LP4ETR	PRODUCTION

This is the most up-to-date revision of the Data Sheet.

Software Resources

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Tools & Simulations

ADIsimPLL™

ADIsimPLL enables the rapid and reliable evaluation of new high performance PLL products from ADI. It is the most comprehensive PLL Synthesizer design and simulation tool available today. Simulations performed include all key non-linear effects that are significant in affecting PLL performance. ADIsimPLL removes at least one iteration from the design process, thereby speeding the design- to-market.

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