ADP2370

• TX
  • 16-bit 12GSPS RFDAC
  • JESD204B Interface
    • 8 lanes up to 12.5Gbps
  • 1x/2x/4x/6x/8x/12x/16x/24x/32x Interpolation
  • 64-bit NCO at max rate
  • Analog Modes of Operation:
    • Normal Mode: 6GSPS DAC rate
      • Synthesis up to 2.5GHz (1st Nyquist)
    • Mix Mode: 6GSPS DAC rate
      • Synthesis in 2nd & 3rd Nyquist zones
    • 2X Normal Mode: 12GSPS DAC rate
      • Synthesis up to 6GHz (1st Nyquist)
    • Excellent dynamic performance
• RX
  • 3.2GHz full power bandwidth at 2.5GSPS
    • Noise Density = -149.5dBFs/Hz, ENOB = 9.5 bits
    • SFDR = 77 dBc at 1GHz Ain (2.5Gsps)
    • SFDR = 77dBc at 1.8GHz Ain (2.5Gsps)
  • +/-0.3 LSB DNL, +/-1.0 LSB INL
  • Dual supplies : 1.3V and 2.5V
  • 8 or 6 Lane JESD204B Outputs
  • Programmable clipping threshold for Fast Detect output
  • Two Integrated wide band digital down converters (DDC) per channel
    • 10-bit complex NCO
    • 2 cascaded half band filters (dec/8, dec/16)
  • Timestamp for synchronous processing alignment
    • SYSREF Setup/Hold detector
  • Programmable Interrupt (IRQ) event monitor

The AD-FMComms11-EBZ board is a system platform board for communication infrastructure applications that demonstrates the Direct to RF (DRF) transmitter and observation receiver architecture. Using high sample rate RFDAC(s) and RFADC(s), a number of components in previous generation transmitters can be eliminated, such as mixers, modulators, IF amplifiers and filters. The objective being to bring the ADC or DAC as close to the antenna as possible, leading to possibly more cost effective and efficient communications solution.

It is composed of multi-GSPS RF ADC and DAC, AD9625 and AD9162 respectively. The transmit path contains a balun, low pass filter, gain block and variable attenuation to produce an output appropriate for a power amplifier module. Along the observation path, the PA output is coupled back into the board through a variable attenuator, a balun and finally the ADC. Clock management is taken care of on board; all the necessary clocks are generated from a reference. Power management is present as well.

This evaluation board is obsolete and no longer recommended. For more information visit ADI EagleEye™.

The Blackfin Low-power Imaging Platform (BLIP) is a low cost, low power embedded computer vision platform targeting a vast array of real-time sensing applications. BLIP leverages the latest entry within the industry-leading, low power Blackfin processor family as well as Analog Devices’ optimized software library deliverables. This solution offers end equipment manufacturers an out of the box form factor development platform with multiple functional profiles covering intelligent motion sensing, people counting, vehicle detection, and face detection deployable in both indoor and outdoor use cases. The BLIP system includes an intuitive configuration GUI and enables real-time analysis of captured video, as well as video output/display through an on-board USB port, making it a highly valuable tool for product development. Additionally, the associated documentation package is well positioned to help customers accelerate their time to market.

• Reduces receiver complexity and the number of stages needed, increasing performance and reducing power consumption 
• Avoids image rejection issues and unwanted mixing 

The AD-FMCOMMS6-EBZ eval board is a 400MHz to 4.4GHz receiver based on the AD9652 dual 16bit analog to digital converter, the ADL5566 High Dynamic Range RF/IF Dual Differential Amplifier and the ADL5380 quadrature demodulator.

This is an I and Q demodulation approach to direct convert (also known as a homodyne or zero IF) receiver architecture. Direct conversion radios perform just one frequency translation compared to a super-heterodyne receiver that can perform several frequency translations. One frequency translation is advantageous because it:

• Reduces receiver complexity and the number of stages needed, increasing performance and reducing power consumption
• Avoids image rejection issues and unwanted mixing

This topology will provide image rejection and early implementation of the differential signal environment. There is an amplification stage to maintain the full-scale input to the ACD. The local oscillator and ADC clock are on board and share the same reference signal prevent smearing. The form factor is VITA57 compliant and all of the DC power is routed from the data capture board through an FMC connector. This evaluation board demonstrates a high performance receiver signal chain aimed at military and commercial radar using “commercial off the shelf” (COTS) components. The overall circuit has a bandwidth of 220MHz with a pass band flatness of +/_ 1.0 dB. The SNR and SFDR measured at an IF of 145MHz are 64dB and 75dBc, respectively.

The AD-TRXBOOST1-EBZ is an add on board for the FMCOMMS2/3/4/5 boards which contain the AD9361. While the complete chip level design package can be found on the ADI product pages, information regarding the board itself, how to use it and the design package that surrounds it, can be found on the Analog wiki site.

The purpose of the AD-TRXBOOST1-EBZ is to boost the transmit and receive signal to improve the dynamic range and increate the output power of the AD9361 around 2.45GHz which is what the board is tuned for.

The AD-FREQCVT1-EBZ is an add on board for the FMCOMMS3/4/5 boards which contain the AD9361. While the complete chip level design package can be found on the ADI product pages, information on the card, how to use it, the design package that surrounds it, and the software which can make it work, can be found on the analog wiki site.

The purpose of the AD-FREQCVT1-EBZ is frequency up or down conversion to allow the AD9361 to operate down to 1MHz.

• Data acquisition solution fully characterized over 0°C to 70°C
• Guaranteed 20-bit no missing codes
• INL: ±2 ppm, DNL: ±0.25 ppm
• Throughput: 1.8 MSPS
• Offset error drift: ±3.5 ppm/°C; gain error drift: ±6 ppm/°C
• SNR: 98 dB at G = 1, 92 dB at G = 10, f_IN = 1 kHz
• THD: −120 dB at G = 1, −116 dB at G = 10, f_IN = 1 kHz
• Oversampled dynamic range: 102 dB at 900 kSPS, OSR = 2
• Software programmable bipolar input ranges (±1 V to ±10 V)
  • Allows single-ended and differential signals
• CMRR: 92 dB typical
• GΩ input impedance allows direct interface with sensors
• Ease of use features reduce system power and complexity
• ADC Input overvoltage clamp protection sinks up to 50 mA
• On-board 5 V reference and buffer
• First conversion accurate, no latency/pipeline delay
• Fast conversion time allows low SPI clock rates
• SPI-/QSPI-/MICROWIRE-/DSP-compatible serial interface