AD9789
AD9789
PRODUCTION14-Bit, 2400 MSPS RF DAC with 4-Channel Signal Processing
- Part Models
- 4
- 1ku List Price
- Starting From $70.22
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Part Details
- DOCSIS 3.0 performance: 4 QAM carriers
- ACLR over full band (47 MHz to 1 GHz)
- −75 dBc @ fOUT = 200 MHz
- −72 dBc @ fOUT = 800 MHz (noise)
- −67 dBc @ fOUT = 800 MHz (harmonics)
- Unequalized MER = 42 dB
- ACLR over full band (47 MHz to 1 GHz)
- On chip and bypassable
- 4 QAM encoders with SRRC filters, 16× to 512× interpolation, rate converters, and modulators
- Flexible data interface: 4, 8, 16, or 32 bits wide with parity
- Power: 1.6 W (IFS = 20 mA, fDAC = 2.4 GHz, LVDS interface)
- Direct to RF synthesis support with fS mix mode
- Built-in self-test (BIST) support
- Input connectivity check
- Internal random number generator
The AD9789 is a flexible QAM encoder/interpolator/upconverter combined with a high performance, 2400 MSPS, 14-bit RF digital-to-analog converter (DAC). The flexible digital interface can accept up to four channels of complex data. The QAM encoder supports constellation sizes of 16, 32, 64, 128, and 256 with SRRC filter coefficients for all standards.
The on-chip rate converter supports a wide range of baud rates with a fixed DAC clock. The digital upconverter can place the channels from 0 to 0.5 × fDAC. This permits four contiguous channels to be synthesized and placed anywhere from dc to fDAC.
The AD9789 includes a serial peripheral interface (SPI) for device configuration and status register readback. The flexible digital interface can be configured for data bus widths of 4, 8, 16, and 32 bits. It can accept real or complex data.
The AD9789 operates from 1.5 V, 1.8 V, and 3.3 V supplies for a total power consumption of 1.6 W. It is supplied in a 164-ball chip scale package ball grid array for lower thermal impedance and reduced package parasitics. No special power sequencing is required. The clock receiver powers up muted to prevent start-up noise.
Product Highlights
- Highly integrated and configurable QAM mappers, interpolators, and upconverters for direct synthesis of one to four DOCSIS- or DVB-C-compatible channels in a block.
- Low noise and intermodulation distortion (IMD) performance enable high quality synthesis of signals up to 1 GHz.
- Flexible data interface supports LVDS for improved SFDR or CMOS input data for less demanding applications.
- Interface is configurable from 4-bit nibbles to 32-bit words and can run at up to 150 MHz CMOS or 150 MHz LVDS double data rate (DDR).
- Manufactured on a CMOS process, the AD9789 uses a proprietary switching technique that enhances dynamic performance.
Applications
- Broadband communications systems
- CMTS/DVB
- Cellular infrastructure
- Point-to-point wireless
Documentation
Solutions Bulletin & Brochure 1
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
---|---|---|---|
AD9789BBC | 164-Ball CSPBGA (12mm x 12mm x 1.22mm) | ||
AD9789BBCRL | 164-Ball CSPBGA (12mm x 12mm x 1.22mm) | ||
AD9789BBCZ | 164-Ball CSPBGA (12mm x 12mm x 1.22mm) | ||
AD9789BBCZRL | 164-Ball CSPBGA (12mm x 12mm x 1.22mm) |
Part Models | Product Lifecycle | PCN |
---|---|---|
Feb 11, 2015 - 14_0254 Bump and Assembly Transfer of Select 10x10 and 12x12 Flip Chip Products |
||
AD9789BBC | ||
AD9789BBCRL | ||
AD9789BBCZ | PRODUCTION | |
AD9789BBCZRL | PRODUCTION |
This is the most up-to-date revision of the Data Sheet.
Software Resources
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Hardware Ecosystem
Parts | Product Life Cycle | Description |
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Clock Distribution Devices 4 | ||
ADCLK914 | RECOMMENDED FOR NEW DESIGNS | Ultrafast, SiGe, Open-Collector HVDS Clock/Data Buffer |
LTC6955 | LAST TIME BUY | Ultralow Jitter, 7.5GHz, 11 Output Fanout Buffer Family |
LTC6953 | LAST TIME BUY | Ultralow Jitter, 4.5GHz Clock Distributor with 11 Outputs and JESD204B/JESD204C Support |
HMC7043 | RECOMMENDED FOR NEW DESIGNS |
High Performance, 3.2 GHz, 14-Output Fanout Buffer with JESD204B/JESD204C |
Clock Generation Devices 4 | ||
AD9518-1 | RECOMMENDED FOR NEW DESIGNS | 6-Output Clock Generator with Integrated 2.5 GHz VCO |
LTC6951 | LAST TIME BUY | Ultralow Jitter Multi-Output Clock Synthesizer with Integrated VCO |
LTC6952 | LAST TIME BUY | Ultralow Jitter, 4.5GHz PLL with 11 Outputs and JESD204B / JESD204C Support |
HMC7044 | RECOMMENDED FOR NEW DESIGNS | High Performance, 3.2 GHz, 14-Output Jitter Attenuator with JESD204B and JESD204C Support |
Integer-N PLL 2 | ||
ADF4150 | RECOMMENDED FOR NEW DESIGNS | Fractional-N/Integer-N PLL Synthesizer |
ADF4350 | PRODUCTION | Wideband Synthesizer with Integrated VCO |