ADIN1300

推荐新设计使用

鲁棒的工业、低延迟和低功耗10 Mbps、100 Mbps和1 Gbps以太网PHY

数据手册 (Rev. B) 产品选型表
产品模型
4
产品技术资料帮助

ADI公司所提供的资料均视为准确、可靠。但本公司不为用户在应用过程中侵犯任何专利权或第三方权利承担任何责任。技术指标的修改不再另行通知。本公司既没有含蓄的允许，也不允许借用ADI公司的专利或专利权的名义。本文出现的商标和注册商标所有权分别属于相应的公司。
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产品详情

  • 10BASE-Te/100BASE-TX/1000BASE-T IEEE 802.3兼容
  • MII、RMII和RGMII MAC接口
  • 1000BASE-T RGMII延迟发射<68 ns，接收<226 ns
  • 100BASE-TX MII延迟发射<52 ns，接收<248 ns
  • 可编程RGMII时序延迟和驱动电流
  • 支持TSN
  • EMC测试标准
    • IEC 61000-4-5浪涌(±4 kV)
    • IEC 61000-4-4电快速瞬变(EFT) (±4 kV)
    • IEC 61000-4-2 ESD（±6 kV接触放电）
    • IEC 61000-4-6传导抗扰度(10 V)
    • EN55032电磁辐射骚扰（A类）
    • EN55032传导发射（A类）
  • 使用多电平引脚绑定的非托管配置
  • MDIO/MDC管理接口和中断引脚
  • EEE符合IEEE 802.3az标准
  • 支持IEEE 1588时间戳数据包起始检测
  • 增强型链路检测
  • 电压模式MDI驱动器，无需端接电阻
  • RJ45 MDI翻转能力
  • 自动极性和线对交换校正
  • 电缆诊断（TDR和信号分析）
  • 帧生成器和检查器，多种环回模式
  • 可配置LED
  • 晶振频率/25 MHz时钟输入频率（RMII为50 MHz）
  • 25 MHz/125 MHz同步时钟输出
  • 支持最高16 kB的超长帧
  • 小型封装和宽温度范围
    • 40引脚、6 mm x 6 mm LFCSP封装
    • 额定工作温度范围：-40°C至+105℃
  • 低功耗
    • 330 mW（对于1000BASE-T）
    • 140 mW（对于100BASE-TX）
    • MAC接口VDDIO电源电压：3.3 V/2.5 V/1.8 V
    • 集成电源监控和POR
ADIN1300
鲁棒的工业、低延迟和低功耗10 Mbps、100 Mbps和1 Gbps以太网PHY
ADIN1300 Functional Block Diagram ADIN1300 Pin Configuration
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参考资料

数据手册 2

用户手册 1

应用笔记 13

技术文章 3

常见问题 1

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添加至 myAnalog

将产品添加到myAnalog 的现有项目或新项目中（接收通知）。

创建新项目

软件资源

ADIN1200/ADIN1300 Non Operating System Driver

器件驱动器 2

工具及仿真模型

IBIS 模型 1

评估套件

eval board
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EVAL-ADIN6310T1LEBZ

ADIN6310 Field Switch Reference Design User Guide

立即购买 更多内容

特性和优点

  • 6 port Ethernet switch ADIN6310
    • 2Gb trunk ports; SGMII by SMA or ADIN1300 by RGMII
    • 4 spur 10BASE-T1L ports, ADIN1100 by RGMII
  • IEEE 802.3cg-compliant SPoE PSE controller, LTC4296-1
    • Power Class 12
    • Power classification by SCCP (not enabled)
  • Arm® Cortex®-M4 microcontroller, MAX32690
    • External flash and RAM
  • Zephyr open source software project
  • Unmanaged mode with basic switch and PSE power
    • VLAN IDs 1-10 enabled on all ports
    • Power coupled to 10BASE-T1L cable for all spur ports
    • DIP switch options to enable other features (Time Sync, LLDP, IGMP Snooping)
  • Managed mode using switch evaluation package TSN/Redundancy evaluations
  • Time sensitive networking (TSN) capable
    • Scheduled traffic (IEEE 802.1Qbv)
    • Frame preemption (IEEE 802.1Qbu)
    • Per stream filtering and policing (IEEE 802.1Qci)
    • Frame replication and elimination for reliability (IEEE 802.1CB)
  • IEEE 802.1AS 2020 time synchronization
  • Redundancy capabilities
    • High availability seamless redundancy (HSR)
    • Parallel redundancy protocol (PRP)
    • Media redundancy protocol (MRP)
  • Host interface hardware strapping with jumpers, choice of
    • Single/Dual/Quad SPI interface
    • 10Mbps/100Mbps/1000Mbps Ethernet port (Port 2/Port 3)
    • SGMII/100BASE-FX/1000BASE-KX
    • Header for direct SPI access (Single/Dual/Quad)
  • Scale port count by cascading by RJ45 or SGMII/1000BASE-KX/ 100BASE-FX
  • PHY strapping by surface-mount configuration resistors
    • Default state is software power down for spur Ports
  • Switch firmware manages PHY operation over MDIO
  • Operates from a single, external 9V to 30V supply
  • LED indicators on GPIO, TIMER pins

产品详情

This user guide describes the ADIN6310 Field switch evaluation board with support for four 10BASE-T1L spur ports and two standard Gigabit capable Ethernet trunk ports. The hardware includes single-pair power over Ethernet (SPoE) LTC4296-1 circuit with optional serial communication classification protocol (SCCP) support. The default operation of the hardware is an unmanaged mode where the MAX32690 Arm Cortex-M4 microcontroller configures the switch into a basic switching mode and the PSE configured for Class 12 operation. Enhance the unmanaged switch operation by the DIP switch (S4), which provides ability to enable features such as time synchronization, LLDP, or IGMP snooping by default. Disable the PSE by using the DIP switch, default is enabled.

For more extensive switch evaluation, refer to the TSN switch evaluation package available from the ADIN6310 product page. This evaluation package provides ability to exercise the TSN functionality in addition to Redundancy features.

eval board
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EVAL-ADIN1300

ADIN1300 评估板

立即购买 更多内容

特性和优点

  • 用于MII接口、MDIO信号和状态信号的FMC连接器
  • 可操作、表贴配置电阻和拨号盘式开关
  • 采用单个外部5 V电源供电

产品详情

EVAL-ADIN1300FMCZ允许对ADIN1200鲁棒、工业、低延迟10 Mbps、100 Mbps、1 Gbps以太网物理层(PHY)的关键特性进行简化评估。评估板通过单个外部5 V电源供电。所有芯片的电源都从这个5 V供电轨调节，为器件提供AVDD3P3、VDD0P9和VDDIO供电轨。

提供P3现场可编程门阵列(FPGA)夹层连接器(FMC)用于连接主FPGA系统，进行媒体访问控制(MAC)接口和管理数据输入/输出(MDIO)控制。

MDIO也可通过作为套件一部分随附的可选MDIO接口加密狗控制。

eval board
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ADMV96S-WGBE-EK1

60 GHz Wireless Connector

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特性和优点

  • Allows evaluation and prototyping of 60 GHz wireless data links to replace traditional mechanical connectors in moving joints
  • 1 Gbps Ethernet interface on both sides of the wireless data link
  • Fully programmable system allowing ultimate flexibility for custom developments
  • Open-source software stack for firmware development  
  • Open-source GUI for system configuration, monitoring, and control

产品详情

The ADMV96S-WGBE-EK1 is a complete evaluation and prototyping system for 60 GHz wireless data links. It consists of a pair of receiver and transmitter boards with a 1Gbp Ethernet interface on each side of the wireless link.

The 60 GHz wireless link is implemented by the ADMV9615 and ADMV9525 modules. These are coupled with a SerDes device which translates the modules’ SGMII interface to RGMII so that it can be connected to an ADIN1300 industrial low latency and low power 1 Gbps Ethernet PHY. This enables each side of the wireless link to act as an Ethernet port and essentially create a seamless wire-like connection between two ends of an Ethernet cable.

The on-board MAX32650 ultralow power ARM® Cortex®-M4 microcontroller controls the system’s operation and implements the algorithms to configure the wireless link in real time so that optimal link quality is constantly maintained over temperature and various operating conditions. An open-source software stack is provided for firmware development as well as reference applications. The MAX32650 can be programmed through a programming port which can also be used for firmware debugging.

The two sides of the wireless link are mounted on an adjustable rail so that the system can be configured and tested for various distances between the links. Each side of the link is powered from an external 12 V power supply.

An open-source GUI is provided for system configuration, monitoring, and control from a host PC.

APPLICATIONS

  • 60 GHz wireless data links for industrial and medical high data rate applications
  • High speed data for rotating applications, such as slip rings and magnetic resonance imaging systems
  • Autonomous guided vehicles
  • Mechanical Connector replacement

eval board
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AD-JUPITER-EBZ

Software-Defined Radio

立即购买 更多内容

特性和优点

  • RF/SDR
    • ADRV9002 transceiver
    • 2 x receiver, 2 x transmitter
    • LO frequency range 30 MHz to 6 GHz
    • 12 kHz to 40 MHz frequency bandwidth
    • Sampling rate 12 kSPS to 61.44 MSPS
  • External Device Clock Input
  • External MCS Input
  • RF Front-end
  • Processing System
    • Zynq UltraScale+ MPSoC XCZU3EG
      • ARM Cortex-A53 1.5 GHz
      • ARM Cortex-R5 500 MHz
      • Mali-400 MP2 graphic processor
      • Programmable logic 154 k
    • DDR4 – 2 GB (x32)
    • Boot source
      • SD card 3.0
      • Flash memory 128 MB
    • User Interfaces
      • USB 3.1 Gen 1 – Type C
        • Upstream Facing Port (UFP)
        • Downstream Facing Port (DFP)
        • USB 2.0 compatible
    • Ethernet 1000BASE-T RGMII
    • Display Port v1.2 (2 lanes, 5.4 Gbps)
    • SATA 3
    • USB (micro) debug interface
    • 16 GPIOs (3V3 LVCMOS)
  • Power Sources
    • USB Type-C (power only)
      • Power Sink 5V, 9V/3A
    • USB Type-C (data)
      • Power Sink 5V/3A
      • Power Source 5V/0.9 A
    • 802.3at POE compliant, 25.5 W Type2 (POE+)

产品详情

The AD-JUPITER-EBZ is a versatile software-defined platform based on Analog Devices ADRV9002 and Xilinx Zynq UltraScale+ MPSoC. The ADRV9002 is a new generation RF transceiver that has dual-channel transmitters, dual-channel receivers covering a frequency range of 30 MHz to 6 GHz. This device has a high-quality RF linearity performance and a set of advanced features like fast profiles switching, flexible power vs. performance configuration, fast frequency hopping, multi-chip synchronization, and digital pre-distortion (DPD) for narrow and wide band waveform.

The evaluation platform includes XCZU3EG processing device that has a wide range of interfaces, making the system capable of local processing or streaming to a remote host. It comes integrated in a self-contained ruggedized aluminum case, which gives flexibility in evaluating and prototyping across different environments.

APPLICATIONS

  • Aerospace and Defense
  • Communications
  • Advanced Education
EVAL-ADIN6310T1LEBZ
ADIN6310 Field Switch Reference Design User Guide
EVAL-ADIN6310T1LEBZ Evaluation Board Photo Angle View EVAL-ADIN6310T1LEBZ Evaluation Board Photo Top View EVAL-ADIN6310T1LEBZ Evaluation Board Photo Bottom View
EVAL-ADIN1300
ADIN1300 评估板
EV-ADIN1300FMCZCONNECTEDANGLE-web EV-ADIN1300FMCZCONNECTEDTOP-web EV-ADIN1300FMCZCONNECTEDBOTTOM-web EV-ADIN1300FMCZTOP-web EV-ADIN1300FMCZBOTTOM-web
ADMV96S-WGBE-EK1
60 GHz Wireless Connector
ADMV96S-WGBE-EK1-Block-Diagram ADMV96S-WGBE-EK1 Angle Projection ADMV96S-WGBE-EK1 Side Projection
AD-JUPITER-EBZ
Software-Defined Radio
AD-JUPITER-EBZ Board Photo Angle View AD-JUPITER-EBZ Board Photo Top View AD-JUPITER-EBZ Board Photo Back View AD-JUPITER-EBZ Block Diagram

参考电路

Figure 1. EVAL-CN0506-FMCZ Simplified Block Diagram (All Connections and Decoupling Not Shown)
Figure 1. EVAL-CN0506-FMCZ Simplified Block Diagram (All Connections and Decoupling Not Shown)
EVAL-CN0506-FMCZ Evaluation Board
EVAL-CN0506-FMCZ Evaluation Board - Top View
EVAL-CN0506-FMCZ Evaluation Board - Bottom View
CN0506 参考设计

10 Mbps/100 Mbps/1000 Mbps双通道、低功耗工业以太网PHY

查看参考设计详情

特性和优点

  • 支持RGMII、RMII和MII模式
  • 双端口允许环形或线型拓扑结构
  • 可以1000Mbsps驱动154m电缆
CN0506
10 Mbps/100 Mbps/1000 Mbps双通道、低功耗工业以太网PHY
Figure 1. EVAL-CN0506-FMCZ Simplified Block Diagram (All Connections and Decoupling Not Shown)
EVAL-CN0506-FMCZ Evaluation Board
EVAL-CN0506-FMCZ Evaluation Board - Top View
EVAL-CN0506-FMCZ Evaluation Board - Bottom View

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