AD5684
PRODUCTIONQuad, 12-Bit nanoDAC+™ with SPI Interface
- Part Models
- 5
- 1ku List Price
- Starting From $5.41
Part Details
- High relative accuracy (INL): ±2 LSB maximum @ 16 bits
- Tiny package: 3 mm × 3 mm, 16-lead LFCSP
- Total unadjusted error (TUE): ±0.1% of FSR maximum
- Offset error: ±1.5 mV maximum
- Gain error: ±0.1% of FSR maximum
- High drive capability: 20 mA, 0.5 V from supply rails
- User selectable gain of 1 or 2 (GAIN pin)
- Reset to zero scale or midscale (RSTSEL pin)
- 1.8 V logic compatibility
- 50 MHz SPI with readback or daisy chain
- Low glitch: 0.5 nV-sec
- Low power: 1.8 mW at 3 V
- 2.7 V to 5.5 V power supply
- −40°C to +105°C temperature range
The AD5686/AD5684, a member of the nanoDAC+™ family, is a low power, quad, 16-/12-bit buffered voltage output DAC. The device includes a gain select pin giving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). All devices operate from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design, and exhibits less than 0.1% FSR gain error and 1.5 mV offset error performance. The devices are available in a 3 mm × 3 mm LFCSP and a TSSOP package.
The AD5686/AD5684 also incorporate a power-on reset circuit and a RSTSEL pin that ensures that the DAC outputs power up to zero scale or midscale and remain at that level until a valid write takes place. Each part contains a per-channel power-down feature that reduces the current consumption of the device to 4 μA at 3 V while in power-down mode.
The AD5686/AD5684 employ a versatile SPI interface that operates at clock rates up to 50 MHz, and all devices contain a VLOGIC pin intended for 1.8 V/3 V/5 V logic.
Product Highlights
- High Relative Accuracy (INL): ±2 LSB maximum
- Excellent DC Performance.
Total unadjusted error: ±0.1% of FSR maximum
Offset error: ±1.5 mV maximum
Gain error: ±0.1% of FSR maximum - Two Package Options: 3 mm × 3 mm, 16-lead LFCSP and 16-lead TSSOP
Applications
- Digital gain and offset adjustment
- Programmable attenuators
- Process control (PLC I/O cards)
- Industrial automation
- Data acquisition systems
Documentation
Data Sheet 1
User Guide 1
Application Note 1
Device Drivers 3
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
---|---|---|---|
AD5684ARUZ | 16-Lead TSSOP | ||
AD5684ARUZ-RL7 | 16-Lead TSSOP | ||
AD5684BCPZ-RL7 | 16-Lead LFCSP (3mm x 3mm w/ EP) | ||
AD5684BRUZ | 16-Lead TSSOP | ||
AD5684BRUZ-RL7 | 16-Lead TSSOP |
Part Models | Product Lifecycle | PCN |
---|---|---|
Jan 20, 2014 - 14_0019 Datasheet Correction for selected AD531X, AD568X and AD569X parts |
||
AD5684ARUZ | PRODUCTION | |
AD5684ARUZ-RL7 | PRODUCTION | |
AD5684BCPZ-RL7 | PRODUCTION | |
AD5684BRUZ | PRODUCTION | |
AD5684BRUZ-RL7 | PRODUCTION | |
Aug 6, 2014 - 13_0223 Assembly and Test Transfer of Select 2x3mm and 3x3mm LFCSP Products to STATS ChipPAC China |
||
AD5684BCPZ-RL7 | PRODUCTION |
This is the most up-to-date revision of the Data Sheet.
Software Resources
Device Drivers 3
Evaluation Software 0
Can't find the software or driver you need?
Hardware Ecosystem
Tools & Simulations
LTspice
Models for the following parts are available in LTspice:
- AD5684R
Precision DAC Error Budget Tool
The Precision DAC Error Budget Tool is a web application that calculates the DC Accuracy of precision DAC signal chains. It shows how the static errors accumulate throughout your signal chain to quickly evaluate the design tradeoffs. Calculations include the DC errors introduced by Voltage References, Operation Amplifiers and Precision DACs.
Open ToolIBIS Model 1
LTspice® is a powerful, fast and free simulation software, schematic capture and waveform viewer with enhancements and models for improving the simulation of analog circuits.