LTC6950

数据手册 1

• LTC6950: 1.4GHz Low Phase Noise, Low Jitter PLL with Clock Distribution Data Sheet 12/29/2014

可靠性数据 1

• R565 Reliability Data 03/23/2018

用户手册 1

• DC1795A - Demo Manual 01/05/2015

应用笔记 1

• AN165 - Multi-Part Clock Synchronization Methods for Large Data Acquisition Systems 09/07/2017

技术文章 2

• 1.4GHz Low Jitter PLL with Clock Distribution Solves Difficult Clocking Problems: Multi-Clock Synchronization and Data Converter Clocking 01/01/2015

• Multi-Output Clock Synthesizer with Integrated VCO Features the Low Jitter Required to Drive Modern High Speed ADC and DAC Clock Inputs 05/01/2006

解决方案设计及宣传手册 1

• 1.4GHz Clean Clocking Solution 02/06/2015

产品选型卡 2

• Ultralow Jitter Clock Generation and Distribution 01/05/2015

• Ultralow Jitter Clock Generators and Distributors Maximize Data Converter SNR 03/04/2016

新闻 1

• 具 PLL 的 5 输出超低抖动时钟分配器提供独特的多芯片输出同步方法 01/22/2015

Evaluation Software 1

ClockWizard

ClockWizard builds on PLLWizard and simplifies the evaluation process of the LTC6950. Besides the ability to design the loop filter components and predict the resulting phase noise and jitter performance, ClockWizard introduces a scope plot which shows the LTC6950 outputs in the time domain and illustrates the phase relationships between the outputs based on their respective EZSync settings. It also controls the LTC6950 demoboard via the DC590 or DC2026.

• Readme - Complete Installation Instructions
• Download - For Windows 7, Windows Vista, and Windows XP or Windows Server 2003 with at least .NET 3.5 SP1