A Highly Integrated, System-Level Approach to Ease Design of Isolated Software Configurable I/O Channels

Abstract

This article presents a software configurable input/output (I/O) device and its dedicated isolated power and data solution that helps solve the design challenges in system-level industrial application designs. This article explains the benefits of system-level thinking when designing a single IC and focuses on the power optimization functionality of the proposed solution.

Introduction

When designing system-level, isolated I/O solutions for industrial applications, such as process control, factory automation, or building control systems, there are many areas to consider. These include power dissipation, data isolation, and form factor. Figure 1 shows the system solution that solves power, isolation, and area challenges using the AD74115H and the ADP1034 in an isolated single-channel software configurable I/O solution. By combining the power and data isolation in the ADP1034 and the software configurability of the AD74115H, an isolated single-channel I/O system can be designed using only two ICs and minimal external circuitry.

System-Level Solution

The ADP1034 is a high performance, isolated power management unit combining an isolated flyback regulator, an inverting buck boost regulator, and a buck regulator providing three isolated power rails and integrating seven low power digital isolators. The ADP1034 also has programmable power control (PPC) functionality that is used for adjusting the voltage on V_OUT1 on-demand through a single-wire interface. V_OUT1 provides between 6 V and 28 V to the AD74115H AV_DD power rail. V_OUT2 provides 5 V to the AD74115H power rails AV_CC and DV_CC. It can also provide a supply voltage to an external reference if required. V_OUT3 provides between –5 V and –24 V to the AD74115H AV_SS power rail.

Power Dissipation and Optimization

When designing channel-to-channel isolated modules, the main trade-off is usually between power dissipation and channel density. As module sizes shrink and channel densities increase, the power dissipation per channel must decrease to accommodate the maximum power dissipation budget for the module. In this case, the module is defined as the ADP1034 and AD74115H, which when combined provide isolated power, data isolation, and software configurable I/O functions.

What makes the AD74115H and ADP1034 an optimum low power solution is the introduction of integrated PPC functionality. PPC gives the user the ability to adjust the V_OUT1 voltage (AD74115H AV_DD supply voltage) on-demand. This method minimizes power dissipation in the module under low load conditions particularly in current output modes.

When using the PPC functionality, the host controller in the system sends the required voltage code via SPI to the AD74115H, which is then passed to the ADP1034 via a one-wire serial interface (OWSI). The OWSI has CRC implemented to provide robustness against EMC interference that may be present in harsh industrial environments.

If we look at the example power dissipation calculation, we can see that if AV_DD = 24 V and the load is 250 Ω, for a current output of 20 mA, there will be a total of 748 mW dissipated in the module. When we use PPC to drop the AV_DD voltage to 8.6 V (load voltage + headroom), there is ~348 mW dissipated in the module. This reveals a power saving of 400 mW within the module.

Example Power Dissipation Calculation

In Example 1 and Example 2, the current output use case is selected and is driving a 20 mA output. The load is 250 Ω and the ADC is enabled and converting the default measurement configuration at 20 samples per second.

Figure 1. An ADP1034 and AD74115H circuit diagram.

Example 1 (No PPC):

AD74115H Output Power = (AV_DD = 24 V) × 20 mA = 480 mW

AD74115H Input Power = AD74115H_QUIESCENT (206 mW) + ADC Power (30 mW) + 480 mW = 716 mW

Module Input Power = 716 mW + ADP1034 Power (132 mW) = 848 mW

Load Power = 20 mA² × 250 Ω = 100 mW

Total Module Power = (Module Input Power – Load Power) = 748 mW

In Example 2, we can see that when the PPC functionality is enabled to reduce AV_DD to the required voltage (20 mA × 250 Ω) + 3.6 V headroom = 8.6 V then the power dissipated in the module drops to 348 mW.

Example 2 (PPC Enabled):

AD74115H Output Power = (AV_DD = 8.6 V) × 20 mA = 172 mW

AD74115H Input Power = AD74115H_QUIESCENT (136 mW) + ADC Power (30 mW) + 172 mW = 338 mW

Module Input Power = 338 mW + ADP1034 Power (100 mW) = 448 mW

Load Power = 20 mA² × 250 Ω = 100 mW

Total Module Power = (Module Input Power – Load Power) = 348 mW

Figure 2 shows the measured power dissipated on the AD74115H applications board at 25°C. The measurement shows the power dissipated is marginally lower than the calculated power dissipation. This will vary slightly from device to device.

Figure 2. Measurement data 20 mA into 250 Ω load, AV_DD = 24 V, AV_DD = 8.6 V (PPC used).

Figure 3 shows the module (ADP1034 and AD74115) power dissipation using PPC (optimized AV_DD was programmed for each load resistor value) vs. different load resistor values. Two different voltages were applied to V_INP of the ADP1034 (15 V and 24 V) to show the efficiency of the ADP1034. Measurements were taken at 25°C.

Figure 3. Power dissipation vs. R_LOAD at 20 mA output.

Figure 4 shows the power dissipation using PPC (optimized AV_DD was programmed for each load resistor value) vs. different load resistor values over temperature.

Figure 4. Power dissipation vs. temperature.

Table 1. AD74115H Typical Use Case Power Dissipation Using PPC

V_INP(V)	AV_DDVoltage (V)	Use Case	Load	Power (mW)
24	8.6	Current output	250 Ω	322
24	18	Voltage input	N/A	250
24	18	Current input externally powered	24 mA	HART enabled	HART disabled
				422	334
24	18	Current input loop powered with HART^®	24 mA	456
24	16.5	Voltage output bipolar 12 V range	1 kΩ	ZS code	FS code
				345	333
24	18	2-wire RTD	250 Ω	260
24	18	3-wire RTD	250 Ω	295
24	18	4-wire RTD	250 Ω	268
24	18	Digital input logic	2.4 mA sink	297
24	18	Digital input loop powered	250 Ω	667
24	12	Digital output internal	12 V relay ~278 Ω coil resistance	Sourcing	Sinking
				265	285

Digital Output Use Case

In industrial applications, digital output is recognized as the most power demanding use case. The AD74115H supports internal and external sourcing and sinking digital output. The ADP1034 can source enough power for the internal digital output function, capable of sourcing or sinking up to 100 mA continuous current. In this case, the digital output circuitry supply DO_V_DD is connected directly to AV_DD. For currents higher than 100 mA, the external digital output function must be used, which requires an additional power supply connected to DO_V_DD.

Internal Digital Output Use Case Timeouts

To support charging of capacitive loads on initial power-on, a higher short circuit current limit (~280 mA) can be enabled for a programmable amount of time, T1, while using the internal digital output use case. A second short-circuit limit (~140 mA) is deployed once the T1 time has elapsed. This is a lower current limit and is active for a programmable duration of time, T2. As more current is demanded from the system during these short circuit conditions, care must be taken to ensure the ADP1034 V_OUT1 voltage doesn’t dip. To ensure there is no dip, a voltage of 24 V is recommended as the system supply voltage to ADP1034 for a required DO_V_DD of 24 V. This is a typical required voltage for a 24 V relay. In the case of a 12 V relay, a minimum system supply voltage (ADP1034 V_INP) of 18 V is recommended to ensure enough current can be sourced to the load.

Figure 5 and Figure 6 show the DO_V_DD vs. T1 and T2 short circuit limits proving the stability of sourcing high current with the ADP1034.

Figure 5. System supply = 24 V, DO_V_DD voltage = 24 V.

Figure 6. System supply = 24 V, DO_V_DD voltage = 12 V.

Data Isolation and Solution Size

Using Analog Devices’ patented iCoupler^® technology, the ADP1034 integrates three isolated power rails including SPI data and three GPIO isolation channels in a 7 mm × 9 mm package. This high level of integration helps solve PCB real estate challenges as it consolidates all channel isolation requirements into a small area on the PCB. Power savings are also realized. The controller side on the ADP1034 puts the other SPI isolator channels in a low power state when the channels are not in use. This means that the channels are only active when required. The three isolated GPIO channels are used to isolate the RESET, ALERT, and ADC_RDY pins of the AD74115H, thus providing all the isolation requirements of the AD74115H without the added cost of an additional isolator IC.

Conclusion

Designing a low power, small form factor channel-to-channel isolated I/O solution can be a challenge for some of the most experienced designers in the industry. The ADP1034 and AD74115H system-level solution simplifies the challenge with the high level of integration and system-level design approach. With a single IC providing three isolated power rails from a single system supply and integrated data isolation, the BOM cost reduces significantly. Coupled with the flexibility of the AD74115H, the system design will satisfy most I/O industrial applications.