MAX5850

Obsolete

14-Bit 3.072Gsps RF DAC

RF DAC Enables Fully Digital Upconverter for DOCSIS 3.1 Remote PHY Devices and CCAP

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Part Details

  • Simplifies RF Design and Enables New Communication Architectures
    • Enables Multi-Band RF Modulation
  • Direct RF Synthesis of 1.5GHz Bandwidth
    • 3.072Gsps DAC Output Update Rate
    • High-Performance 14-Bit RF DAC Core
  • Highly Flexible and Configurable
    • 6-Lane JESD204B Input Data Interface
    • 10.24Gbps Serial Data Rate
    • Subclass-0 Compliant
    • Divided Reference Clock Output
    • SPI Interface for Device Configuration
MAX5850
14-Bit 3.072Gsps RF DAC
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Documentation

Technical Articles 1

Evaluation Design File 1

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Complete documentation is available upon completion of a Non-Disclosure Agreement (NDA).

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Tools & Simulations

IBIS Model 1

Evaluation Kits

MAX5850EVKIT

Evaluation Kit for the MAX5850

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Features and Benefits

  • Evaluates MAX5850 RF DAC Performance, Capability, and Feature Set
  • Single 3.3V Input Voltage Supply
  • Direct Interface with Xilinx VC707 Data Source Board
  • Windows 7/8-Compatible Software
  • On-Board SPI Interface Control for the MAX5850
  • On-Board SMBus Interface Control for the MAX6654 Temperature Sensor
  • Integrated GUI Controls for VC707 Operation
  • Proven 10-Layer PCB Design
  • Fully Assembled and Tested

Product Details

The MAX5850 evaluation kit (EV kit) contains a single MAX5850 high-performance 14-bit, 3.072Gsps digitalto- analog converter (DAC) which can directly synthesize 1.5GHz of instantaneous bandwidth in baseband. The device is optimized for cable access and digital video broadcast applications and meets spectral emission requirements for a broad set of radio transmitters and modulators, including DOCSIS 3.1/3.0, DVB-C/-C2, DVB-T2, ISDB-T, and EPoC. The MAX5850 EV kit provides a complete system for evaluating performance of the MAX5850 device as well as development of a digital video solution.

The MAX5850 accepts input data through a six-lane JESD204B serializer/deserializer (SerDes) interface at 10.24Gbps that is Subclass-0 compliant. The MAX5850 EV kit connects to one FMC connector on the Xilinx® VC707 evaluation kit, allowing the FPGA board to communicate with the MAX5850’s JESD204B serial link interface.

The evaluation kit includes Windows® 7/8-compatible software that provides a simple graphical user interface (GUI) for configuring all the MAX5850 registers through the SPI interface, controlling of the VC707 FPGA, and monitoring the temperature.

Applications

  • Cable Modem Termination Systems (CMTS)
  • Digital Video Broadcast Modulators
  • DOCSIS 3.1 Remote PHY Devices, CCAP
  • Edge QAM Devices
  • Ethernet PON over Coax (EPoC)
  • Instrumentation
MAX5850EVKIT
Evaluation Kit for the MAX5850

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