AD4056
RECOMMENDED FOR NEW DESIGNSCompact, Low Power, 12-Bit, 2 MSPS/500 kSPS Easy Drive SAR ADC
- Part Models
- 3
- 1ku List Price
- Starting From $2.64
Part Details
- Small footprint, big performance
- INL: ±0.1 LSB maximum
- SNR: 73.8 dB with VREF = 3.3 V
- 1.35 nJ per conversion
- 1.35 mW/0.68 mW at 1 MSPS/500 kSPS in sample mode
- 370 μW/112 μW at 1 MSPS/300 kSPS in autonomous modes
- 4.1 μW standby power
- Versatile signal conditioning integration
- Easy Drive features enable small, low-power AFE designs
- Compatible with differential and single-ended signal chains
- Wide common-mode input range
- Minimizes digital host activity and power dissipation
- Autonomous sampling with window comparator and interrupt generation
- Averaging filter with continuous and burst sampling options
- Power cycling synchronization for companion devices
- 4-wire SPI compatible with 1.8 V to 3.3 V logic
- 2.00 mm × 2.6 mm LFCSP and 1.67 mm × 1.97 mm WLCSP
- Wide operating temperature range: −40°C to +125°C
The AD4050/AD4056 are versatile, 12-bit, successive approximation register (SAR) analog-to-digital converters (ADCs) that enable low-power, high-density data acquisition solutions without sacrificing precision. These ADCs offer a unique balance of performance and power efficiency, plus innovative features for seamlessly switching between high-resolution and low-power modes tailored to the immediate needs of the system. The AD4050/AD4056 are ideal for battery-powered, compact data acquisition and edge sensing applications.
The Easy Drive features enable highly efficient analog front end (AFE) designs. The small sampling capacitors (3.4 pF) maximize input impedance, thus reducing the dependence on high-bandwidth, power-hungry amplifiers typically required by SAR ADCs. The wide input common-mode range grants inherent support for both differential and single-ended signals.
The AD4050/AD4056 support microcontrollers with power-down modes and interrupt-driven firmware. The autonomous modes enable out-of-range event detection while the digital host sleeps. The averaging modes deliver on-demand, high-resolution measurements while offloading computations from the host processor. The self timed device enable signal (DEV_EN) synchronizes AFE device power cycling to the ADC sampling instant, optimizing system power consumption while minimizing power-up settling error artifacts. The AD4050/AD4056 also support power cycling the voltage reference and using the supply as the ADC reference voltage (VREF) for additional power savings.
The device configuration and ADC data readback are supported via a robust, 4-wire serial peripheral interface (SPI) with cyclic redundancy check (CRC) supported for all data transfers. The AD4050/AD4056 are available in compact LFCSP and WLCSP packages and operate across a wide temperature range, making them ideal for a diverse set of applications.
APPLICATIONS
- Battery-powered data acquisition
- Vital signs monitoring
- Biological and chemical analysis
- Geologic and seismic sensing
- Motion and robotics
Documentation
Data Sheet 1
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| AD4056BCBZ-RL7 | CHIPS W/SOLDER BUMPS/WLCSP | ||
| AD4056BCPZ-R2 | LFCSP:LEADFRM CHIP SCALE | ||
| AD4056BCPZ-RL7 | LFCSP:LEADFRM CHIP SCALE |
This is the most up-to-date revision of the Data Sheet.
Hardware Ecosystem
| Parts | Product Life Cycle | Description |
|---|---|---|
| Positive Linear Regulators (LDO) 3 | ||
| ADP7118 | RECOMMENDED FOR NEW DESIGNS | 20 V, 200 mA, Low Noise, CMOS LDO Linear Regulator |
| ADP7112 | RECOMMENDED FOR NEW DESIGNS | 20 V, 200 mA, Low Noise, CMOS LDO Linear Regulator |
| ADP150 | PRODUCTION | Ultralow Noise, 150 mA CMOS Linear Regulator |
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