ADRF5515
RECOMMENDED FOR NEW DESIGNSDual-Channel, 3.3 GHz to 4.0 GHz, 20 W Receiver Front End
- Part Models
- 3
- 1ku List Price
- Starting From $9.76
Part Details
- Integrated dual-channel RF front end
- 2-stage LNA and high power silicon SPDT switch
- On-chip bias and matching
- Single supply operation
- Gain
- High gain mode: 33 dB typical at 3.6 GHz
- Low gain mode: 16 dB typical at 3.6 GHz
- Low noise figure
- High gain mode: 1.0 dB typical at 3.6 GHz
- Low gain mode: 1.0 dB typical at 3.6 GHz
- High isolation
- RXOUT-CHA and RXOUT-CHB: 45 dB typical
- TERM-CHA and TERM-CHB: 60 dB typical
- Low insertion loss: 0.45 dB typical at 3.6 GHz
- High power handling at TCASE = 105°C
- Full lifetime
- LTE average power (9 dB PAR): 43 dBm
- Full lifetime
- High OIP3 (high gain mode): 32 dBm typical
- Power-down mode and low gain mode for LNA
- Low supply current
- High gain mode: 86 mA typical at 5V
- Low gain mode: 36 mA typical at 5V
- Power-down mode: 12 mA typical at 5V
- Positive logic control
- 6 mm × 6 mm, 40-lead LFCSP package
- Pin compatible with the ADRF5545A, 10 W version
The ADRF5515 is a dual-channel, integrated RF, front-end, multichip module designed for time division duplexing (TDD) applications. The device operates from 3.3 GHz to 4.0 GHz. The ADRF5515 is configured in dual channels with a cascading, two-stage, LNA and a high power silicon SPDT switch.
In high gain mode, the cascaded two-stage LNA and switch offer a low noise figure of 1.0 dB and a high gain of 33 dB at 3.6 GHz with an output third-order intercept point (OIP3) of 32 dBm (typical). In low gain mode, one stage of the two-stage LNA is in bypass, providing 16 dB of gain at a lower current of 36 mA. In power-down mode, the LNAs are turned off and the device draws 12 mA.
In transmit operation, when RF inputs are connected to a termination pin (TERM-CHA or TERM-CHB), the switch provides low insertion loss of 0.45 dB and handles long-term evolution (LTE) average power (9 dB peak to average ratio (PAR)) of 43 dBm for full lifetime operation.
The ADRF5515 is pin-compatible with the ADRF5545A, 10 W version, which operates from 2.4 GHz to 4.2 GHz.
The ADRF5515 does not require any matching components at the RF ports that are internally matched to 50 Ω. The ANT and TERM ports are also internally ac-coupled. Therefore, only receiver ports require external dc blocking capacitors.
The device comes in an RoHS compliant, compact, 6 mm × 6 mm, 40-lead LFCSP package.
Applications
- Wireless infrastructure
- TDD massive multiple input and multiple output and active antenna systems
- TDD-based communications systems
Documentation
Product Selection Guide 1
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| ADRF5515BCPZN | 40-Lead LFCSP (6mm x 6mm w/ EP) | ||
| ADRF5515BCPZN-R7 | 40-Lead LFCSP (6mm x 6mm w/ EP) | ||
| ADRF5515BCPZN-RL | 40-Lead LFCSP (6mm x 6mm w/ EP) |
This is the most up-to-date revision of the Data Sheet.
Tools & Simulations
S-Parameter 1
Evaluation Kits
Evaluating the ADRF5515 Dual-Channel, 3.3 GHz to 4.0 GHz, Receiver Front End