ADG1207L

• Single inline headers provide flexibility for the field programmable gate array (FPGA) or microcontroller 1.2 V or 1.8 V logic input signals
• SMD pin resistor or capacitor sockets available for the addition of passive components
• SMB connector sockets provide flexibility for the input and outputsignals

The EVAL-ADG1206LEBZ/EVAL-ADG1207LEBZ are the evaluation boards for the ADG1206L/ADG1207L. The ADG1206L/ADG1207L contain sixteen single channels and eight differential channels, respectively. The ADG1206L switches one of sixteen inputs to a common output, as determined by 4-bit binary address lines A0, A1, A2, and A3. The ADG1207L switches one of eight differential inputs to a common differential output, as determined by the 3-bit binary address lines, A0, A1, and A2. The enable pin (EN) on both devices is used to enable or disable the device. When disabled, all channels are switched off. When on, each channel conducts equally well in both directions and has an input signal range that extends to the supplies.

An external V_L supply pin provides logic control flexibility for lower logic controls. The ADG1206L/ADG1207L is both 1.2 V and 1.8 V JEDEC standard compliant.

Figure 1 and Figure 2 in the user guide show the EVAL-ADG1206LEBZ and EVALADG1207LEBZ in a typical evaluation setup. The ADG1206L/ADG1207L is placed in the center of the evaluation board, and wire screw terminals are provided to connect to each source and drain pin. Three screw terminals are used to power the device and an external pin provides users with a defined digital logic supply voltage. Alternatively, the digital logic supply voltage can be supplied from 5-pin and 6-pin headers.

Full specifications on the ADG1206L/ADG1207L are available in the ADG1206L/ADG1207L data sheet, which must be consulted in conjunction with the user guide when using the EVAL-ADG1206LEBZ/EVAL-ADG1207LEBZ.