AD9094
RECOMMENDED FOR NEW DESIGNS8-Bit, 1 GSPS, JESD204B, Quad Analog-to-Digital Converter
- Part Models
- 2
- 1ku List Price
- Starting From $136.43
Part Details
- JESD204B (Subclass 1 and Subclass 0) coded serial digital outputs
- Lane rates up to 15 Gbps
- 1.6 W total power at 1 GSPS
- 400 mW per ADC channel
- SFDR: 71 dBFS at 611 MHz (1.44 V p-p input range)
- SNR: 48.6 dBFS at 611 MHz (1.44 V p-p input range)
- SINAD: 48.5 dBFS at 611 MHz (1.44 V p-p input range)
- 0.9 V, 1.8 V, and 2.5 V dc supply operation
- No missing codes
- Internal ADC voltage reference
- Analog input buffer
- On-chip dithering to improve small signal linearity
- Flexible differential input range
- 1.44 V p-p to 2.16 V p-p (1.44 V p-p default)
- 1.4 GHz analog input full power bandwidth
- Fast detect bits for efficient AGC implementation
- Differential clock input
- Integer clock divide by 1, 2, 4, or 8
- On-chip temperature diode
- Flexible JESD204B lane configurations
The AD9094 is an 8-bit, 1 GSPS, quad analog-to-digital converter (ADC). The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. The device is designed to sample wide bandwidth analog signals up to 1.4 GHz. The AD9094 is optimized for wide input bandwidth, a high sampling rate, high works linearity, and low power in a small package.
The quad-ADC cores feature multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs that support a variety of user-selectable input ranges. An integrated voltage reference facilitates design considerations. The analog inputs and clock signals are differential inputs.
Users can configure each pair of intermediate frequency (IF) receiver outputs onto either one or two lanes of JESD204B Subclass 1 or Subclass 0, high speed, serialized outputs, depending on the sample rate and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF±, SYNCINB±AB, and SYNCINB±CD input pins.
The AD9094 has flexible power-down options that allow significant power savings when desired. To program the power down options, use the 1.8 V capable, serial port interface (SPI).
The AD9094 is available in a Pb-free, 72-lead, lead frame chip scale package (LFCSP) and is specified over a junction temperature range of −40°C to +105°C. This product may be protected by one or more U.S. or international patents.
Note that throughout the data sheet, multifunction pins, such as PDWN/STBY, are referred to either by the entire pin name or by a single function of the pin, for example, PDWN, when only that function is relevant.
Product Highlights
- Low power consumption per channel.
- JESD204B lane rate support up to 15 Gbps.
- Wide, full power bandwidth supports IF sampling of signals up to 1.4 GHz.
- Buffered inputs ease filter design and implementation.
- Four integrated wideband decimation filters and numerically controlled oscillator (NCO) blocks supporting multiband receivers.
- Programmable fast overrange detection.
- On-chip temperature diode for system thermal management.
Applications
- Laser imaging, detection, and ranging (LIDAR)
- Communications
- Digital oscilloscope (DSO)
- Ultrawideband satellite receivers
- Instrumentation
Documentation
Data Sheet 1
User Guide 1
Device Drivers 1
Analog Dialogue 1
Webcast 1
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| AD9094BCPZ-1000 | 72-Lead LFCSP (10mm x 10mm w/ EP) | ||
| AD9094BCPZRL7-1000 | 72-Lead LFCSP (10mm x 10mm w/ EP) |
| Part Models | Product Lifecycle | PCN |
|---|---|---|
|
Jun 26, 2023 - 23_0025 Package Outline Drawing and Data Sheet Revision for Select LFCSP Products in Amkor |
||
| AD9094BCPZ-1000 | PRODUCTION | |
| AD9094BCPZRL7-1000 | PRODUCTION | |
This is the most up-to-date revision of the Data Sheet.
Software Resources
Device Drivers 1
Evaluation Software 0
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Hardware Ecosystem
| Parts | Product Life Cycle | Description |
|---|---|---|
| Clock Distribution Devices 3 | ||
| HMC6832 | LAST TIME BUY | Low Noise, 2:8 Differential, Fanout Buffer |
| HMC7043 | RECOMMENDED FOR NEW DESIGNS |
High Performance, 3.2 GHz, 14-Output Fanout Buffer with JESD204B/JESD204C |
| LTC6953 | LAST TIME BUY | Ultralow Jitter, 4.5GHz Clock Distributor with 11 Outputs and JESD204B/JESD204C Support |
| Clock Generation Devices 4 | ||
| AD9528 | RECOMMENDED FOR NEW DESIGNS | JESD204B/JESD204C Clock Generator with 14 LVDS/HSTL Outputs |
| HMC7044 | RECOMMENDED FOR NEW DESIGNS | High Performance, 3.2 GHz, 14-Output Jitter Attenuator with JESD204B and JESD204C Support |
| LTC6952 | LAST TIME BUY | Ultralow Jitter, 4.5GHz PLL with 11 Outputs and JESD204B / JESD204C Support |
| LTC6951 | LAST TIME BUY | Ultralow Jitter Multi-Output Clock Synthesizer with Integrated VCO |
Tools & Simulations
LTspice® is a powerful, fast and free simulation software, schematic capture and waveform viewer with enhancements and models for improving the simulation of analog circuits.
Evaluation Kits
AD9094 Evaluation Board