ADSP1802

推荐用于新设计

SHARC Processor

产品技术资料帮助

ADI公司所提供的资料均视为准确、可靠。但本公司不为用户在应用过程中侵犯任何专利权或第三方权利承担任何责任。技术指标的修改不再另行通知。本公司既没有含蓄的允许,也不允许借用ADI公司的专利或专利权的名义。本文出现的商标和注册商标所有权分别属于相应的公司。

产品详情

  • High performance 32-bit/40-bit floating-point processor for high performance audio processing
  • SIMD computational architecture
  • On-chip memory
    • 5 Mb L1 on-chip RAM
    • 8 Mb L2 RAM
  • Maximum instruction rate up to 400 MHz
  • Supports VISA
  • Supports FIR, IIR, FFT accelerator
  • DAI
    • 8 SPORTs
    • 4 PCGs
    • 1 S/PDIF transceiver
    • 4 ASRCs with −140 dB SNR performance
    • 1 IDP/PDAP
    • 1 DAI SRU
  • DPI
    • 2 SPIs
    • 1 UART
    • 12 flags
    • 1 TWI
    • 3 PWM modules (PWM1, PWM2, and PWM3)
    • 2 general-purpose timers
    • 1 DPI SRU2
  • 1 thermal diode
  • AEC-Q100 qualified for automotive applications
ADSP1802
SHARC Processor
提问

参考资料

了解更多

软件资源

找不到您所需的软件或驱动?

申请驱动/软件

评估套件

eval board
EVAL-ADSP1802

Evaluating the ADSP1802 SHARC Processor

特性和优点

  • Analog Devices, Inc., ADSP1802 SHARC processor
    • Core performance up to 400 MHz
    • 88-lead lead frame chip scale (LFCSP) package
    • 25 MHz CLKIN oscillator/crystal
    • On-chip memory
      • 5 Mb L1 on-chip RAM
      • 8 Mb L2 RAM
  • 128 Mb SPI flash memory
  • Analog audio interface
    • Analog Devices AD1939 audio codec
    • 8 × 3.5 mm jacks for 8 channels of stereo output
    • 4 × 3.5 mm jacks for 4 channels of stereo input
    • Supports all 8 DACs and 4 ADCs in TDM and I2S modes at 48kHz, 96 kHz, and 192 kHz sample rates
  • Digital audio interface (S/PDIF)
    • Radio Corporation of America (RCA) phono jack output
    • RCA phono jack input
  • Temperature monitor
  • UART
  • 13 LEDs
  • 5 push buttons
  • JTAG in-circuit emulator (ICE) 14-pin header

产品详情

The user guide explains the design and setup of the EVALADSP1802EBZ evaluation board. This evaluation board provides all digital applications interface (DAI) and digital peripheral interface (DPI) inputs/outputs by using jumpers and switches. The evaluation board is designed to be used in conjunction with the CrossCore Embedded Studio (CCES) environment to test the capabilities of the ADSP1802 processor, which interfaces to the EVAL-ADSP1802EBZ via the ICE-1000/ICE-2000 emulators. The EVAL-ADSP1802EBZ can be powered by an adapter or a 5 V supply. Any of these supplies are regulated to the voltages required on the EVAL-ADSP1802EBZ. The EVAL-ADSP1802EBZ contains four channels of analog-to-digital converter (ADC) input and eight channels of digital-to-analog converter (DAC) output. The core clock can be provided by a 25 MHz oscillator, crystal, or external CLK.

EVAL-ADSP1802
Evaluating the ADSP1802 SHARC Processor

最新评论

近期浏览