AD9136
RECOMMENDED FOR NEW DESIGNSDual, 16-Bit, 2.8 GSPS, TxDAC+® Digital-to-Analog Converter
- Part Models
- 4
- 1ku List Price
- Starting From $77.04
Part Details
- Support input data rate >2 GSPS
- Proprietary low spurious and distortion design
- SFDR = 82 dBc at dc IF, −9 dBFS
- Flexible 8-lane JESD204B interface
- Multiple chip synchronization
- Fixed latency
- Data generator latency compensation
- Selectable 1×, 2×, 4×, or 8× interpolation filter
- Low power architecture
- Transmit enable function allows extra power saving and instant control of the output status
- High performance, low noise phase-locked loop (PLL) clock multiplier
- Digital inverse sinc filter
- Low power: 1.42 W at 1.6 GSPS full operating conditions
- 88-lead LFCSP with exposed pad
The AD9135/AD9136 are dual, 11-/16-bit, high dynamic range digital-to-analog converters (DACs) that provide a maximum sample rate of 2800 MSPS, permitting a multicarrier generation over a very wide bandwidth. The DAC outputs are optimized to interface seamlessly with the ADRF6720, as well as other analog quadrature modulators (AQMs) from Analog Devices, Inc. An optional 3-wire or 4-wire serial port interface (SPI) provides for programming/readback of many internal parameters. The full-scale output current can be programmed over a typical range of 13.9 mA to 27.0 mA. The AD9135/AD9136 are available in an 88-lead LFCSP.
Product Highlights
- Greater than 2 GHz, ultrawide complex signal bandwidth enables emerging wideband and multiband wireless applications.
- Advanced low spurious and distortion design techniques provide high quality synthesis of wideband signals from baseband to high intermediate frequencies.
- JESD204B Subclass 1 support simplifies multichip synchronization in software and hardware design.
- Fewer pins for data interface width with a serializer/deserializer (SERDES) JESD204B eight-lane interface.
- Programmable transmit enable function allows easy design balance between power consumption and wake-up time.
- Small package size with 12 mm × 12 mm footprint.
Applications
- Wireless communications
- 3G/4G W-CDMA base stations
- Wideband repeaters
- Software defined radios
- Wideband communications
- Point to point
- Local multipoint distribution service (LMDS) and multichannel multipoint distribution service (MMDS)
- Transmit diversity, multiple input/multiple output (MIMO)
- Instrumentation
- Automated test equipment
Documentation
Data Sheet 1
Technical Articles 2
FPGA Interoperability Reports 2
Device Drivers 1
Webcast 2
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| AD9136BCPAZ | 88-Lead LFCSP (12mm x 12mm w/ EP) | ||
| AD9136BCPAZRL | 88-Lead LFCSP (12mm x 12mm w/ EP) | ||
| AD9136BCPZ | 88-Lead LFCSP (12mm x 12mm w/ EP) | ||
| AD9136BCPZRL | 88-Lead LFCSP (12mm x 12mm w/ EP) |
| Part Models | Product Lifecycle | PCN |
|---|---|---|
|
Jun 26, 2023 - 23_0025 Package Outline Drawing and Data Sheet Revision for Select LFCSP Products in Amkor |
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| AD9136BCPAZ | PRODUCTION | |
| AD9136BCPAZRL | PRODUCTION | |
| AD9136BCPZ | PRODUCTION | |
| AD9136BCPZRL | PRODUCTION | |
|
Aug 31, 2016 - 16_0160 AD9135/AD9136 Die Revision and Data Sheet Update |
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| AD9136BCPAZ | PRODUCTION | |
| AD9136BCPAZRL | PRODUCTION | |
| AD9136BCPZ | PRODUCTION | |
| AD9136BCPZRL | PRODUCTION | |
|
Apr 2, 2015 - 15_0057 AD9135/AD9136 Die Revision and Data Sheet Update |
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| AD9136BCPZ | PRODUCTION | |
| AD9136BCPZRL | PRODUCTION | |
This is the most up-to-date revision of the Data Sheet.
Software Resources
Device Drivers 1
Evaluation Software 2
JESD204x Frame Mapping Table Generator
The JESD204x Frame Mapping Table Generator tool consists of two Windows executables that will allow the user to input any valid combination of JESD204x parameters (L, M, F, S, NP) in order to output a .csv file that illustrates the frame mapping of the JESD204x mode in table format. There is an executable that allows the user to input a single JESD204x mode and another, that allows the user to input the parameters for multiple JESD204x modes in a specified .csv format in order to output a .csv file that illustrates the frame mapping of each of the JESD204x modes that were input into separate tables.
JESD204 Interface Framework
Integrated JESD204 software framework for rapid system-level development and optimization
Can't find the software or driver you need?
Hardware Ecosystem
| Parts | Product Life Cycle | Description |
|---|---|---|
| Clock Distribution Devices 3 | ||
| LTC6955 | LAST TIME BUY | Ultralow Jitter, 7.5GHz, 11 Output Fanout Buffer Family |
| LTC6953 | LAST TIME BUY | Ultralow Jitter, 4.5GHz Clock Distributor with 11 Outputs and JESD204B/JESD204C Support |
| HMC7043 | RECOMMENDED FOR NEW DESIGNS |
High Performance, 3.2 GHz, 14-Output Fanout Buffer with JESD204B/JESD204C |
| Clock Generation Devices 2 | ||
| LTC6952 | LAST TIME BUY | Ultralow Jitter, 4.5GHz PLL with 11 Outputs and JESD204B / JESD204C Support |
| HMC7044 | RECOMMENDED FOR NEW DESIGNS | High Performance, 3.2 GHz, 14-Output Jitter Attenuator with JESD204B and JESD204C Support |
Tools & Simulations
Virtual Eval - BETA
Virtual Eval is a web application to assist designers in product evaluation of ADCs, DACs, and other ADI products. Using detailed models on Analog’s servers, Virtual Eval simulates crucial part performance characteristics within seconds. Configure operating conditions such as input tones and external jitter, as well as device features like gain or digital down-conversion. Performance characteristics include noise, distortion, and resolution, FFTs, timing diagrams, response plots, and more.
Open ToolIBIS Model 1
AD9144/AD9152/AD9154/AD9135/AD9136 AMI Model Download
Open ToolAD9136 Simulink ADIsimDAC Model
Open ToolDAC Companion Transport Layer RTL Code Generator
These command line executable tool generates a Verilog module which implements the JESD204 transmitter transport layer. The user specifies in a configuration file one or more modes to be supported by the transport layer module. These modes are defined as a set of JESD204 parameter values: L, M, F, S, N', and CF. The transport layer converts JESD204 lane data output from a JESD204 link layer IP to a data bus with a fixed width, containing interleaved virtual converter samples. Both JESD204B and JESD204C link layers are supported.
Open ToolLTspice® is a powerful, fast and free simulation software, schematic capture and waveform viewer with enhancements and models for improving the simulation of analog circuits.
Evaluation Kits
ADS8-V1 Evaluation Board
Resources
AD9136 Evaluation Board
Resources
FPGA Based Data Capture Kit