SRS TruVolume, SHARC
The SRS TruVolume® library for the SHARC processor implements automatic volume-control post-processing that adjusts the amplitude of a stereo audio signal to maintain a constant perceived level of loudness in spite of level changes in the input audio material.
トップへ
製品概要
機能と利点
- C callable 'Push' API.
- Code compatible across all ADSP-2136x and ADSP-214xx SHARC processors.
- No dependencies on processor peripherals or registers.
- Officially certified by SRS Labs, Inc. for the ADSP-2136x processors and ADSP-214xx processors.
- Reference Code Revision : 2.1.2.255.
- No framework dependencies.
- Released as object code module with C source wrapper.
- Format of input and output audio PCM data is IEEE single-precision floating-point, either interleaved or non-interleaved, which is configurable through API.
- Output/Input buffers can contain 160 to 512 samples per block, configurable in increments of 8, or 512 to 1008 samples per block configurable in increments of 16.
- Supported sample rates: 32, 44.1 and 48 kHz.
製品概要
SRS TruVolume® is an automatic volume-control post-processing module that adjusts the amplitude of a stereo audio signal to maintain a constant perceived level of loudness in spite of level changes in the input audio material. The algorithm monitors 20 frequency bands and reacts differently to level changes in
The ADI SRS TruVolume library supports sample rates of 32, 44.1 and 48 kHz and block sizes from 160 to 1008 samples. It also allows setting the response to input level changes at three possible levels of "aggressiveness".
The ADI implementation of the SRS TruVolume® post-processor on SHARC has been fully tested using all certification tests according to SRS Labs requirements.
ライセンス
Each module supports the Analog Devices, Inc. (ADI) Blackfin or SHARC Processor family and is a licensed product that is available in object code format. Recipients must sign or accept a license agreement with ADI prior to being shipped or downloading the modules identified in the license agreement.
パフォーマンス測定基準
| SHARC Processor Family |
Code RAM (KiB) |
Data RAM (KiB) |
Constant Data Tables (KiB) |
MIPS |
|
| Average |
Average Peak |
||||
| 2136x |
41.2 |
32.1 |
4.0 |
35.6 |
36.6 |
| 214xx |
32.6 |
32.1 |
4.0 |
35.2 |
36.2 |
- This table highlights example SHARC processors and expected MIPS performance.
- MIPS measured using Fs = 48 kHz, 2 channels, optimal memory layout, worst case test vector, default configurations, ADSP-21364 processor silicon revision 0.5 and ADSP-21489 processor silicon revision 0.2.
- “Data RAM” is for one instance and includes stack and scratch memory, instance state, single input and output buffers each containing 512 samples, 256 samples per channel.
- VISA short-word mode is enabled when compiling ADSP-214xx library file, therefore the code size of ADSP-214xx library is smaller than that of ADSP-2136x library.
- 1 KiB = 1024 Bytes.
システム条件
- Windows XP Professional SP3 (32-bit only).
- Windows Vista Business/Enterprise/Ultimate SP2 (32-bit only). It is recommended to install the software in a non-UAC-protected location.
- Windows 7 Professional/Enterprise/Ultimate (32 and 64-bit). It is recommended to install the software in a non-UAC-protected location.
- Minimum of 2 GHz single core processor, 3.3 GHz dual core is recommended.
- Minimum of 1 GB memory (RAM), 4 GB is recommended.
- Minimum of 2 GB hard disk (HDD) space is required.
- CrossCore® Embedded Studio for Analog Devices Processors.