The AD-PAARRAY3552R-SL reference design provides control, protection, and proper biasing sequence for GaN power amplifier (PA) arrays. The design incorporates the AD3553R high-speed, dual-channel, 16-bit DAC to support the ultrafast sub-µs voltage settling time of GaN gates.
Key fault events, including overvoltage, overcurrent, and overtemperature, are effectively managed by the LTC7000, a static switch driver responsible for system fault protection.
The on-board MAX32666 ultralow-power ARM® Cortex®-M4 microprocessor provides essential debug and programming features for a comprehensive software development experience with the system. The system's firmware is built on ADI's open-source no-OS framework and includes a user-friendly graphical interface (GUI) for evaluation. Updates are easily applied through an SWD UART bootloader, streamlining prototyping.
The system can be powered by an external +48 V supply, requiring high current capabilities.
APPLICATIONS
- 5G massive MIMOs
- Macro base stations
Specifications
| Fault Events |
| Fault |
Default Limit |
| Overvoltage |
+55 V |
| Overcurrent |
3.5 A |
| Overtemperature |
75°C |
| Output Ports |
| Port Name |
No. of ports |
| GaN gate ports |
6 |
| +48 V Gan drain ports |
4 |
| +5 V ports |
5 |
| Enable ports |
2 |
| Power Supply |
| External |
+48 V DC at 5 A |
| Operating Conditions |
| Temperature Range |
45°C to +75°C |
