MAX17573

• Edge compute platform for machine vision and real-time sensor fusion for autonomous robots and vehicles applications
• 8 x GMSL2 camera interfaces with up to 6 Gbps/channel
• 10 Gbps SFP+ Ethernet interface
• IEEE 1588 Precision Time Protocol for synchronization with host systems and other edge devices
• Advanced embedded processing capabilities
• ROS2 compliant
• Advanced camera triggering functions and control features
• Open-source software stack and FPGA design to enable custom applications development

The AD-GMSL2ETH-SL is an edge compute platform enabling low-latency data transfer from eight Gigabit Multimedia Serial Link™ (GMSL) interfaces on to a 10 Gb Ethernet link. The target applications include autonomous robots and vehicles where machine vision and real-time sensor fusion is critical.

The system includes two MAX96724 Quad Tunneling GMSL2/1 to CSI-2 Deserializers, enabling connectivity to eight GMSL cameras. The video data from the cameras is transferred from the MAX96724 deserializers via MIPI CSI2 interfaces to an AMD KV26 System on Module which implements the logic to aggregate the video data from all the GMSL cameras into a 10 Gb Ethernet link, so that it can be sent to a central processing unit.

The IEEE 1588 Precision Time Protocol (PTP) with hardware timestamping is supported, enabling accurate synchronization with host systems and other edge devices. The AD9545 Quad Input, 10-Output, Dual DPLL/IEEE 1588, 1 pps Synchronizer and Jitter Cleaner is used to generate the required clocks for the 10 Gb Ethernet interface and the PTP logic.

A software networking stack can be used to realize the communication over the 10 Gb Ethernet link. Since the system runs Linux tools like gstreamer can be used to send the video data to a host and remote connection into the system is possible via ssh. The software network stack has limitations in terms of the maximum achievable transfer rate, and for this reason there is also the option to have an FPGA accelerated UDP or TCP implementation with Real Time Transfer (RTP) protocol for data packetization, which can get up to the maximum achievable data rate on the 10 Gb ethernet interface.

Accurate camera triggering control is achieved through dedicated FPGA logic, with configurable frequency and phase as well as selecting the trigger source between the internal logic and external signals.

Sixteen (16) general purpose I/O pins are available with software configurable functionality, operating at 3.3 V voltage level. A RS232 dedicated interface can be used to connect UART peripherals such as GNSS devices.

The design is accompanied by an open-source software stack and FPGA design, and reference applications, enabling custom software development to start from a proven implementation.

APPLICATIONS

• Autonomous robots and vehicles

• Operates over a Wide Input Range
  • MAX17573EVKITA#: V_OUT1 = 3.3V, I_OUT1 = 3.5A, V_IN1 Range = 4.5V to 60V
  • MAX17573EVKITB#: V_OUT2 = 5V, I_OUT2 = 3.5A, V_IN2 Range = 6.5V to 60V
• Enable/UVLO Input, Resistor-Programmable UVLO Threshold
• Selectable PWM, PFM, and DCM Modes of Operation
• Adjustable Soft-Start Time
• Active-Low RESET Output with a Pullup Resistor to an External Supply
• External Clock Synchronization
• Overcurrent and Overtemperature Protection
• Proven PCB Layout
• Fully Assembled and Tested
• Complies with CISPR 32 (EN55032) Class B Conducted and Radiated Emissions

The MAX17573 evaluation kit (EV kit) provides proven 3.3V and 5V designs to evaluate the MAX17573 high-efficiency, wide input voltage Himalaya synchronous DC-DC converter. The 3.3V application circuit delivers load current up to 3.5A from a wide 4.5V to 60V input supply and operates at a 500kHz switching frequency. The 5V application circuit delivers load current up to 3.5A from a wide 6.5V to 60V input supply and operates at a 500kHz switching frequency.

Each application circuit on the EV kit features programmable enable and input Undervoltage Lockout (UVLO), soft-start, open-drain active-low RESET signal, and external clock synchronization. The EV kit’s layout is optimized for conducted and radiated EMI and thermal performance. For more details, refer to the Product Highlights section in the MAX17573 IC data sheet.

• Operates over a Wide Input Range
  • MAX17573EVKITA#: V_OUT1 = 3.3V, I_OUT1 = 3.5A, V_IN1 Range = 4.5V to 60V
  • MAX17573EVKITB#: V_OUT2 = 5V, I_OUT2 = 3.5A, V_IN2 Range = 6.5V to 60V
• Enable/UVLO Input, Resistor-Programmable UVLO Threshold
• Selectable PWM, PFM, and DCM Modes of Operation
• Adjustable Soft-Start Time
• Active-Low RESET Output with a Pullup Resistor to an External Supply
• External Clock Synchronization
• Overcurrent and Overtemperature Protection
• Proven PCB Layout
• Fully Assembled and Tested
• Complies with CISPR 32 (EN55032) Class B Conducted and Radiated Emissions

The MAX17573 evaluation kit (EV kit) provides proven 3.3V and 5V designs to evaluate the MAX17573 high-efficiency, wide input voltage Himalaya synchronous DC-DC converter. The 3.3V application circuit delivers load current up to 3.5A from a wide 4.5V to 60V input supply and operates at a 500kHz switching frequency. The 5V application circuit delivers load current up to 3.5A from a wide 6.5V to 60V input supply and operates at a 500kHz switching frequency.

Each application circuit on the EV kit features programmable enable and input Undervoltage Lockout (UVLO), soft-start, open-drain active-low RESET signal, and external clock synchronization. The EV kit’s layout is optimized for conducted and radiated EMI and thermal performance. For more details, refer to the Product Highlights section in the MAX17573 IC data sheet.