HMC7043B

RECOMMENDED FOR NEW DESIGNS

High-Performance, 3.2 GHz, 14-Output Clock Distributor with JESD204B/JESD204C Support

Part Models
2
1ku List Price
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Part Details

  • JEDEC JESD204B and JESD204C support
  • Low additive jitter: <15 fs rms at 2457.6 MHz (12 kHz to 20 MHz)
  • Very low noise floor: −155.2 dBc/Hz at 983.04 MHz
  • Up to 14 low-voltage differential signaling (LVDS), low-voltage positive emitter coupled logic (LVPECL), or current-mode logic (CML) type device clocks (DCLKs)
    • Maximum CLKOUTx/CLKOUTx and SCLKOUTx/SCLKOUTx frequency of 3200 MHz
    • JESD204B/C compatible system reference (SYSREF) pulses
    • 25 ps analog and one-half clock input cycle digital delay independently programmable on each of 14 clock output channels
  • Serial port interface (SPI)-programmable adjustable noise floor vs. power consumption
  • SYSREF valid interrupt to simplify JESD204B/C synchronization
  • Supports deterministic synchronization of multiple HMC7043B devices
  • RFSYNCIN pin or SPI-controlled SYNC trigger for output synchronization of JESD204B/C
  • GPIO alarm/status indicator to determine system health
  • Clock input to support up to 6 GHz
  • Available in 48-lead, 7 mm × 7 mm LFCSP package
HMC7043B
High-Performance, 3.2 GHz, 14-Output Clock Distributor with JESD204B/JESD204C Support
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