ADAU1861
RECOMMENDED FOR NEW DESIGNSThree ADCs, One DAC, Low Power Codec with Audio DSPs
- Part Models
- 2
- 1ku List Price
- Starting From $8.76
Part Details
- Programmable FastDSP audio processing engine
- Up to 768 kHz sample rate
- Biquad filters, limiters, volume controls, mixing
- Tensilica HiFi 3z DSP core
- Quad MAC per cycle: 24 × 24-bit multiplier and 64-bit accumulator
- Flexible power operation mode: 24.576 MHz, 49.152 MHz, 73.728 MHz, and 98.304 MHz
- 336 kB total memory
- JTAG debug and trace
- Low latency, 24-bit ADCs, and DAC
- 106 dB SNR (signal through ADC with A-weighted filter)
- 110 dB combined SNR (signal through DAC and headphone with A-weighted filter)
- Programmable double precision MAC engine for maximum 24- stage equalizer
- Serial-port sample rates from 8 kHz to 768 kHz
- 5 μs group delay (fS = 768 kHz) analog in to analog out with FastDSP bypass (zero instructions)
- 3 differential or single-ended analog inputs, configurable as microphone or line inputs
- 8 digital microphone inputs
- Analog differential audio output, configurable as either line output or headphone driver
- 2 PDM output channels
- PLL supporting any input clock rate from 30 kHz to 36 MHz
- 4 channel asynchronous sample rate converters (ASRCs)
- 2, 16-channel serial audio ports supporting I2S, left-justified, right-justified, or up to TDM16 (TDM12 in turbo mode)
- 8 interpolators and 8 decimators with flexible routing
- Power supplies
- Analog AVDD at 1.8 V typical
- Digital I/O IOVDD at 1.1 V to 1.98 V
- Digital DVDD at 0.85 V to 1.21 V
- Headphone HPVDD_L at 1.2 V to AVDD
- Control/communication interfaces
- I2C, SPI, or UART control ports
- Main quad SPI (QSPI)
- UART communication port
- Self-boot from QSPI flash
- Flexible GPIO and IRQ
- AEC-Q100 qualified for automotive applications
- 64-lead lead frame chip scale package [LFCSP], 9 mm × 9 mm and 0.75 mm package height
The ADAU1861 is a codec with three inputs and one output that incorporates two digital-signal processors (DSPs). The path from the analog input to the DSP core to the analog output is optimized for low latency.
APPLICATIONS
- Automotive audio systems
- Digital audio effects processors
Documentation
Data Sheet 1
User Guide 2
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| ADAU1861BCSZ-RL | 64-lead LFCSP-CS (Side Solderable) (9 mm x 9 mm x 0,75 mm) | ||
| ADAU1861WBCSZ-RL | 64-lead LFCSP-CS (Side Solderable) (9 mm x 9 mm x 0,75 mm) |
This is the most up-to-date revision of the Data Sheet.
Software Resources
Lark SDK Setup
Lark SDK is embedded firmware package, including driver for all hardware modules of ADAU1860 and ADAU1850. It is delivered in source code format and also featured by log support, friendly high level APIs, etc.
Lark Studio
Lark Studio is a standalone Windows Graphical User Interface (GUI) tool for programing and tuning software on the Lark/Lark-Lite/SSM6515. Lark Studio includes intuitively reading/writing control registers, and providing a drag and drop interface for user to design FastDSP schematic, which can be downloaded to the target directly. It also supports safe loading, generating C source files, calculating tables of filter coefficients and visualizing filter magnitude & phase response. It also supports EQ configuration, along with calculating tables of filter coefficients and visualizing filter magnitude & phase response, generating C source files, and download to the target.
Evaluation Software 0
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Evaluation Kits
Evaluating the ADAU1861 Three ADCs, One DAC, Low Power Codec with Audio DSPs