AD9552

RECOMMENDED FOR NEW DESIGNS

Oscillator Frequency Up Converter

Data Sheet (Rev. E) Product Selection Table

Part Models: 2
1ku List Price: Starting From $6.55

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Part Details

Converts a low frequency input reference signal to a high frequency output signal
Input frequencies from 6.6 MHz to 112.5 MHz
Output frequencies up to 900 MHz
Preset pin programmable frequency translation ratios
Arbitrary frequency translation ratios via SPI port
Accepts a crystal resonator and/or an external oscillator as a reference frequency source

Secondary output (either integer-related to the primary output or a copy of the reference input)
RMS jitter: <0.5 ps
SPI-compatible, 3-wire programming interface
Single supply (3.3 V)
Very low power: <400 mW (under most conditions)
Small package size (5 mm × 5 mm)
On-chip VCO

Part Models: 2
1ku List Price: Starting From $6.55

Documentation

Frequently Asked Question 1

FAQ 03/03/2022

ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.

Part Model	Pin/Package Drawing	Documentation	CAD Symbols, Footprints, and 3D Models
AD9552BCPZ	32-Lead LFCSP (5mm x 5mm)	Material Declaration Reliablity Data	Ultra Librarian SamacSys
AD9552BCPZ-REEL7	32-Lead LFCSP (5mm x 5mm)	Material Declaration Reliablity Data	Ultra Librarian SamacSys

Part Models	Product Lifecycle	PCN

Aug 2, 2012 - 12_0103 Minor Metal Mask Revision and Datasheet Change on the AD9552
		PCN12_0103_Form Material_Report
AD9552BCPZ	PRODUCTION
AD9552BCPZ-REEL7	PRODUCTION
Mar 23, 2012 - 11_0104 Conversion of Select Sizes of LFCSP Package Outlines from Punch to Sawn and Transfer of Assembly Site to ASE-Korea.
		PCN11_0104_Form Material_Report Qualification Report Summary Detailed Change Description Detailed Change Description Package Outline Drawing
AD9552BCPZ	PRODUCTION
AD9552BCPZ-REEL7	PRODUCTION
Aug 26, 2009 - 09_0152 AD9552 Datasheet Change
		Material_Report PCN09_0152_Form Table for PCN 09_0152
AD9552BCPZ	PRODUCTION
AD9552BCPZ-REEL7	PRODUCTION

This is the most up-to-date revision of the Data Sheet.

Software Resources

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Tools & Simulations

AD9552 IBIS Models 1

AD9552 (All Models/All Speed Grades)

Evaluation Kits

AD9552 Evaluation Board

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Features and Benefits

Simple power connection using USB connection and on-board LDO voltage regulators
LDOs are easily bypassed for power measurements
AC-coupled differential LVPECL SMA connectors
SMA connectors for

1 reference input
1 PLL lock detect output

Microsoft Windows^®–based evaluation software with simple graphical user interface
On-board PLL loop filter
Easy access to digital I/O and diagnostic signals via I/O header
Status LEDs for diagnostic signals
USB computer interface
Dip switch configurable for manual operation
Software calculator provides flexibility, allowing programming almost any rational input/output frequency ratio

Product Details

The AD9552 evaluation board is a compact, easy to use platform for evaluating all features of the AD9552 oscillator frequency upconverter.

The AD9552 is a fractional-N phase-locked loop (PLL) based clock generator designed specifically to replace high frequency crystal oscillators and resonators. The device employs a sigmadelta (Σ-Δ) modulator (SDM) to accommodate fractional frequency synthesis. The user supplies an input reference signal by connecting a single-ended clock signal directly to the REF pin or by connecting a crystal resonator across the XTAL pins.

The AD9552 is pin programmable, providing one of 64 standard output frequencies based on one of eight standard input frequencies. The device also has a 3-wire SPI interface, enabling the user to program custom input-to-output frequency ratios.

The AD9552 relies on an external capacitor to complete the loop filter of the PLL. The output is compatible with LVPECL, LVDS, or single-ended CMOS logic levels, although the AD9552 is implemented in a strictly CMOS process.