AD6652

NOT RECOMMENDED FOR NEW DESIGNS

12-Bit, 65 MSPS IF to Base Band Diversity Receiver

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Part Details

  • SNR = 90 dB in 150 kHz bandwidth (to Nyquist @ 61.44 MSPS)
  • Worst harmonic = 83 dBc (to Nyquist @ 61.44 MSPS)
INTEGRATED DUAL-CHANNEL ADC:
  • Sample rates up to 65 MSPS
  • IF sampling frequencies to 200 MHz
  • Internal ADC voltage reference
  • Integrated ADC sample and-hold inputs
  • Flexible analog input range (1 V to 2 V p-p)
  • Differential analog inputs
  • ADC clock duty cycle stabilizer
  • 85 dB channel isolation/crosstalk
INTEGRATED WIDEBAND DIGITAL DOWNCONVERTER (DDC):
  • Crossbar switched DDC inputs
  • Digital resampling for noninteger decimation
  • Programmable decimating FIR filters
  • Flexible control for multicarrier and phased array
  • Dual AGC stages for output level control
  • Dual 16-bit parallel or 8-bit link output ports
  • User-configurable built-in self-test (BIST) capability
  • Energy-saving power-down modes
AD6652
12-Bit, 65 MSPS IF to Base Band Diversity Receiver
AD6652 Functional Block Diagram
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