AD6624A

NOT RECOMMENDED FOR NEW DESIGNS

Four-Channel, 100 MSPS Digital Receive Signal Processor (RSP)

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Part Details

  • 100 MSPS Wideband Input (14-Bit)
  • Four Independent Digital Receivers in a Single Package
  • Digital Re-sampling for non-Integer Decimation Rates
  • 3.3 Volt CMOS
  • Programmable Decimating RAM Coefficient FIR Filters
  • JTAG Boundary Scan, Built in Self Test (BIST) Capability
AD6624A
Four-Channel, 100 MSPS Digital Receive Signal Processor (RSP)
AD6624A Functional Block Diagram
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AD6624 (AD6624A) IBIS Models 2

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