ADAU1860/ADAU1860-1

RECOMMENDED FOR NEW DESIGNS

Three ADCs, One DAC, Low Power Codec with Audio DSPs

Part Models
2
1ku List Price
Starting From $7.30
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Part Details

  • Programmable FastDSP audio processing engine
    • Up to 768 kHz sample rate
    • Biquad filters, limiters, volume controls, mixing
  • Tensilica HiFi 3z DSP core
    • Quad MAC per cycle: 24 x 24-bit multiplier and 64-bit accumulator
    • Flexible power operation mode: 24.576 MHz, 49.152 MHz, 73.728 MHz, and 98.304 MHz
    • 288 kB total memory
    • JTAG debug and trace
  • Low latency, 24-bit ADCs and DAC
    • 106 dB SNR (signal through ADC with A-weighted filter)
    • 110 dB combined SNR (signal through DAC and headphone with A-weighted filter)
  • Programmable double precision MAC engine for maximum 24-stage equalizer
  • Serial port sample rates from 8 kHz to 768 kHz
  • 5 μs group delay (fS = 768 kHz) analog in to analog out with FastDSP bypass (zero instructions)
  • 3 differential or single-ended analog inputs, configurable as microphone or line inputs
  • 8 digital microphone inputs
  • Analog differential audio output, configurable as either line output or headphone drive
  • 2 PDM output channels
  • PLL supporting any input clock rate from 30 kHz to 36 MHz
  • 4 channel asynchronous sample rate converters (ASRCs)
  • 2, 16-channel serial audio ports supporting I2S, left justified, right justified, or up to TDM16 (TDM12 in Turbo mode)
  • 8 interpolators and 8 decimators with flexible routing
  • Power supplies
    • Digital I/O IOVDD at 1.1 V to 1.98 V
    • Digital DVDD at 0.85 V to 1.21 V
    • Headphone HPVDD at 1.8 V typical
    • Headphone HPVDD_L at 1.2 V to HPVDD
  • Control/communication interfaces
    • I2C, SPI, or UART control ports
    • Master quad SPI (QSPI)
    • UART communication port
  • Self-boot from QSPI flash
  • Flexible GPIO and IRQ
  • 56-ball, 0.35 mm pitch, 2.980 mm × 2.679 mm WLCSP

There is a newer version of this part available

ADAU1797A RECOMMENDED FOR NEW DESIGNS

High-Performance Audio Codec with Integrated HiFi 3z and FastDSP Cores

ADAU1860/ADAU1860-1
Three ADCs, One DAC, Low Power Codec with Audio DSPs
ADAU1860 Functional Block Diagram ADAU1860 Pin Configuration
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Software Resources

Lark SDK Setup

Lark SDK is embedded firmware package, including driver for all hardware modules of ADAU1860 and ADAU1850. It is delivered in source code format and also featured by log support, friendly high level APIs, etc.

Lark Studio

Lark Studio is a standalone Windows Graphical User Interface (GUI) tool for programing and tuning software on the Lark/Lark-Lite/SSM6515. Lark Studio includes intuitively reading/writing control registers, and providing a drag and drop interface for user to design FastDSP schematic, which can be downloaded to the target directly. It also supports safe loading, generating C source files, calculating tables of filter coefficients and visualizing filter magnitude & phase response. It also supports EQ configuration, along with calculating tables of filter coefficients and visualizing filter magnitude & phase response, generating C source files, and download to the target.


Evaluation Kits

eval board
EVAL-ADAU1860

Evaluating the ADAU1860 Three ADCs, One DAC, Low Power Codec with Audio DSPs

Product Details

The EVAL-ADAU1860EBZ provides access to all the analog and digital inputs and outputs on the ADAU1860. The ADAU1860 core is controlled by Analog Devices, Inc., Lark Studio software, which interfaces to the EVAL-ADAU1860EBZ via a USB connection. In addition, users can communicate and debug with the Tensilica HiFi 3z DSP core through the JTAG port by using the mIDAS-Link emulator. The software development kit (SDK) is also provided by Analog Devices for code development.

The EVAL-ADAU1860EBZ can be powered by the USB bus or by a single 5 V supply. These supply options are regulated to the voltages required on the EVAL-ADAU1860EBZ. The printed circuit board (PCB) is a 4-layer design, with a ground plane and a power plane on the inner layers. The EVAL-ADAU1860EBZ contains connectors for external microphones and speakers. The master clock can be provided externally or by the on-board 24.576 MHz oscillator.

EVAL-ADAU1860
Evaluating the ADAU1860 Three ADCs, One DAC, Low Power Codec with Audio DSPs
EVAL-ADAU1860EBZ Evaluation Board EVAL-ADAU1860EBZ Evaluation Board - Top View EVAL-ADAU1860EBZ Evaluation Board - Bottom View

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