AD9154

RECOMMENDED FOR NEW DESIGNS

Quad, 16-Bit, 2.4 GSPS, TxDAC+® Digital-to-Analog Converter

Data Sheet (Rev. D) Product Selection Table
Part Models
4
1ku List Price
Starting From $102.72
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Part Details

  • Supports input data rates up to 1 GSPS
  • Proprietary, low spurious and distortion design
    Single carrier LTE 20 MHz bandwidth (BW), ACLR = 77 dBc at 180 MHz IF
    Six carrier GSM IMD = 78 dBc, 600 kHz carrier spacing at 180 MHz IF
    SFDR = 72 dBc at 180 MHz IF, −6 dBFS single tone
  • Flexible 8-lane JESD204B interface
  • Multiple chip synchronization
    Fixed latency
    Data generator latency compensation
  • Input signal power detection
  • High performance, low noise phase-locked loop (PLL) clock multiplier
  • Digital inverse sinc filter
  • Digital quadrature modulation using a numerically controlled oscillator (NCO)
  • Nyquist band selection—mix mode
  • Selectable 1×, 2×, 4×, and 8× interpolation filters
  • Low power: 2.11 W at 1.6 GSPS, full operating conditions
  • 88-lead, exposed pad LFCSP
AD9154
Quad, 16-Bit, 2.4 GSPS, TxDAC+® Digital-to-Analog Converter
AD9154 Functional Block Diagram AD9154 Pin Configuration
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Documentation

Data Sheet 1

Technical Articles 1

Informational 1

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Software Resources

Device Drivers 1

Hardware Ecosystem

Parts Product Life Cycle Description
Clock Distribution Devices 3
LTC6955
LAST TIME BUY Ultralow Jitter, 7.5GHz, 11 Output Fanout Buffer Family
LTC6953
LAST TIME BUY Ultralow Jitter, 4.5GHz Clock Distributor with 11 Outputs and JESD204B/JESD204C Support
HMC7043
RECOMMENDED FOR NEW DESIGNS

High Performance, 3.2 GHz, 14-Output Fanout Buffer with JESD204B/JESD204C
Clock Generation Devices 3
LTC6951
LAST TIME BUY Ultralow Jitter Multi-Output Clock Synthesizer with Integrated VCO
LTC6952
LAST TIME BUY Ultralow Jitter, 4.5GHz PLL with 11 Outputs and JESD204B / JESD204C Support
HMC7044
RECOMMENDED FOR NEW DESIGNS High Performance, 3.2 GHz, 14-Output Jitter Attenuator with JESD204B and JESD204C Support
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Tools & Simulations

IBIS Model 1

AD9144/AD9152/AD9154/AD9135/AD9136 AMI Model Download

Open Tool

DAC Companion Transport Layer RTL Code Generator

These command line executable tool generates a Verilog module which implements the JESD204 transmitter transport layer. The user specifies in a configuration file one or more modes to be supported by the transport layer module. These modes are defined as a set of JESD204 parameter values: L, M, F, S, N', and CF. The transport layer converts JESD204 lane data output from a JESD204 link layer IP to a data bus with a fixed width, containing interleaved virtual converter samples. Both JESD204B and JESD204C link layers are supported.

Open Tool
LTspice

LTspice® is a powerful, fast and free simulation software, schematic capture and waveform viewer with enhancements and models for improving the simulation of analog circuits.

Evaluation Kits

eval board
schematic 1
schematic 2
schematic 3
schematic 4
schematic 5
EVAL-AD9154

Evaluation Board for AD9154 Quad, 16-Bit, 2.4 GSPS, TxDAC+® Digital-to-Analog Product

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Product Details

The AD9154-EBZ, AD9154-M6720-EBZ and the AD9154-FMC-EBZ supports the AD9154 which is a quad, 16-bit, high dynamic range digital-to-analog converter(DAC) that provides a maximum sample rate of 2.4 GSPS, permitting multicarrier generation up to the Nyquist frequency in baseband mode. The AD9154 includes features optimized for direct conversion transmit applications including complex digital modulation, input signal power detection, and gain, phase, and offset compensation. The DAC outputs are optimized to interface seamlessly with the ADRF672x radio frequency quadrature modulators (AQMs) from Analog Devices, Inc. In Mix-Mode, the AD9154 DACs can reconstruct carriers in the 2nd and 3rd Nyquist Zones. A serial port interface (SPI) provides for programming/readback of internal parameters. Full-scale output current can be programmed over a range of 4 mA to 20 mA.

eval board
schematic 6
ADS7-V2EBZ

FPGA Based Data Capture Kit

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Features and Benefits

  • Based on Virtex-7 FPGA 
  • One (1) FMC-HPC connector 
  • Ten (10) 13.1 Gbps transceivers supported 
  • Two (2) DDR3-1866 DIMMs 
  • Simple USB port interface (2.0)



Product Details

The ADS7-V2 Evaluation Board was developed to support the evaluation of Analog Devices high speed A/D converters, D/A converters and Transceivers with JESD204B bit rates up to 13.1 Gbps. The Quick Start Wiki site listed below provides a high level overview of the platform. In addition, each use case of the board has its own section (e.g. Using the ADS7-V2 for High Speed A/D Converter Evaluation). The ADS7-V2 is intended to be used only with specified Analog Devices Evaluation Boards. The ADS7-V2 is not intended to be used as a development platform, and no support is available for standalone operation. Please refer to Xilinx and its approved distributors for FPGA Development Kits

EVAL-AD9154
Evaluation Board for AD9154 Quad, 16-Bit, 2.4 GSPS, TxDAC+® Digital-to-Analog Product
AD9154-FMC-EBZ Evaluation Board AD9154-FMC-EBZ Evaluation Board - Top View AD9154-FMC-EBZ Evaluation Board - Bottom View AD9154-FMC-EBZ Evaluation Board Kit AD9154-FMC-EBZ Evaluation Board Kit - Bottom View
ADS7-V2EBZ
FPGA Based Data Capture Kit
ADS7-V2EBZ

Latest Discussions

10 Weeks Ago
RE: Output stage for AD9154
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