ADCLK925
RECOMMENDED FOR NEW DESIGNSUltrafast SiGe ECL Clock/Data Buffers
- Part Models
- 3
- 1ku List Price
- Starting From $6.58
Part Details
- 95 ps propagation delay
- 7.5 GHz toggle rate
- 60 ps typical output rise/fall
- 60 fs random jitter (RJ)
- On-chip terminations at both input pins
- Extended industrial temperature range: −40°C to +125°C
- 2.5 V to 3.3 V power supply (VCC − VEE)
The ADCLK905 (one input, one output), ADCLK907 (dual one input, one output), and ADCLK925 (one input, two outputs) are ultrafast clock/data buffers fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process.
The ADCLK905/ADCLK907/ADCLK925 feature full-swing emitter coupled logic (ECL) output drivers. For PECL (positive ECL) operation, bias VCC to the positive supply and VEE to ground. For NECL (negative ECL) operation, bias VCC to ground and VEE to the negative supply.
The buffers offer 95 ps propagation delay, 7.5 GHz toggle rate, 10 Gbps data rate, and 60 fs random jitter (RJ).
The inputs have center tapped, 100 Ω, on-chip termination resistors. A VREF pin is available for biasing ac-coupled inputs.
The ECL output stages are designed to directly drive 800 mV each side into 50 Ω terminated to VCC − 2 V for a total differential output swing of 1.6 V.
The ADCLK905/ADCLK907/ADCLK925 are available in 16-lead LFCSP packages.
Applications
- Clock and data signal restoration and level shifting
- Automated test equipment (ATE)
- High speed instrumentation
- High speed line receivers
- Threshold detection
- Converter clocking
Documentation
Data Sheet 1
User Guide 2
Application Note 9
Technical Articles 3
Frequently Asked Question 1
Tutorial 1
Circuit Note 1
Product Selection Guide 1
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| ADCLK925BCPZ-R2 | 16-Lead LFCSP (3mm x 3mm w/ EP) | ||
| ADCLK925BCPZ-R7 | 16-Lead LFCSP (3mm x 3mm w/ EP) | ||
| ADCLK925BCPZ-WP | 16-Lead LFCSP (3mm x 3mm w/ EP) |
| Part Models | Product Lifecycle | PCN |
|---|---|---|
|
Feb 13, 2014 - 14_0038 Conversion of 3x3mm body Size LFCSP Package Outlines from Punch to Sawn and Transfer of Assembly Site to Amkor Philippines. |
||
| ADCLK925BCPZ-R2 | ||
| ADCLK925BCPZ-R7 | PRODUCTION | |
This is the most up-to-date revision of the Data Sheet.
Tools & Simulations
ADCLK925 IBIS Model 1
ADIsimCLK Design and Evaluation Software
ADIsimCLK is the design tool developed specifically for Analog Devices' range of ultra-low jitter clock distribution and clock generation products. Whether your application is in wireless infrastructure, instrumentation, networking, broadband, ATE or other areas demanding predictable clock performance, ADIsimCLK will enable you to rapidly develop, evaluate and optimize your design.
Open ToolEvaluation Kits
ADCLK925 Evaluation Board
Resources
Software-Defined Radio
Resources
Reference Designs
Extending the Low Frequency Range of a High Performance Phase Locked Loop