AD6679

RECOMMENDED FOR NEW DESIGNS

135 MHz BW IF Diversity Receiver

Data Sheet (Rev. B) Product Selection Table
Part Models
2
1ku List Price
Starting From $349.25
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Part Details

  • Parallel LVDS (DDR) outputs
  • In-band SFDR = 82 dBFS at 340 MHz (500 MSPS)
  • In-band SNR = 67.8 dBFS at 340 MHz (500 MSPS)
  • 1.1 W total power per channel at 500 MSPS (default settings)
  • Noise density = −153 dBFS/Hz at 500 MSPS
  • 1.25 V, 2.50 V, and 3.3 V dc supply operation
  • Flexible input range: 1.46 V p-p to 2.06 V p-p (2.06 V p-p nominal)
  • 95 dB channel isolation/crosstalk
  • Amplitude detect bits for efficient automatic gain control (AGC) implementation
  • Noise shaping requantizer (NSR) option for main receiver function
  • See data sheet for additional features
AD6679

135 MHz BW IF Diversity Receiver

AD6679 Functional Block Diagram AD6679 Pin Configuration
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Documentation

Data Sheet 1

User Guide 1

Application Note 1

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Evaluation Kits

eval board
schematic 1
schematic 2
schematic 3
EVAL-AD6679

AD6679 Evaluation Board

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Features and Benefits

  • Full featured evaluation board for the AD6679
  • SPI interface for setup and control
  • Wide band Balun driven input
  • No external supply needed. Uses 12V-1A and 3.3V-3A supplies from FMC
  • VisualAnalog® and SPI controller software interfaces

Product Details

This user guide describes the AD6679 evaluation board which provides all of the support circuitry required to operate the ADC in its various modes and configurations. The application software used to interface with the devices is also described. The HSC-ADC-EVALEZ is the recommended FPGA based data capture board for the AD6679. The ADS7-V2EBZ may alternatively be used as the FPGA based data capture board for the AD6679. 

 The AD6679 data sheet provides additional information and should be consulted when using the evaluation board. All documents and software tools are available at www.analog.com/hsadcevalboard. For additional information or questions, send an email to highspeed.converters@analog.com.

 

Equipment Needed:

  • Analog signal source and antialiasing filter
  • Sample clock source 
  • 12V, 6.5A switching power supply (supplied with the HSC-ADC-EVALEZ or the SL POWER CENB1080A1251F01 supplied with ADS7-V2EBZ)
  • PC running Windows®
  • USB 2.0 port
  • AD6679-500EBZ board
  • HSC-ADC-EVALEZ FPGA-base data capture kit
  • ADS7-V2EBZ FPGA-based data capture kit (optional, but not required)
 

eval board
schematic 4
ADS7-V2EBZ

FPGA Based Data Capture Kit

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Features and Benefits

  • Based on Virtex-7 FPGA 
  • One (1) FMC-HPC connector 
  • Ten (10) 13.1 Gbps transceivers supported 
  • Two (2) DDR3-1866 DIMMs 
  • Simple USB port interface (2.0)



Product Details

The ADS7-V2 Evaluation Board was developed to support the evaluation of Analog Devices high speed A/D converters, D/A converters and Transceivers with JESD204B bit rates up to 13.1 Gbps. The Quick Start Wiki site listed below provides a high level overview of the platform. In addition, each use case of the board has its own section (e.g. Using the ADS7-V2 for High Speed A/D Converter Evaluation). The ADS7-V2 is intended to be used only with specified Analog Devices Evaluation Boards. The ADS7-V2 is not intended to be used as a development platform, and no support is available for standalone operation. Please refer to Xilinx and its approved distributors for FPGA Development Kits

EVAL-AD6679
AD6679 Evaluation Board
EVAL-AD6679 Evaluation Board EVAL-AD6679 Evaluation Board - Top View EVAL-AD6679 Evaluation Board - Bottom View
ADS7-V2EBZ
FPGA Based Data Capture Kit
ADS7-V2EBZ

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