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Design Note 177: 16-Bit, 333ksps ADC Achieves 90dB SINAD, –100dB THD and No Missing Codes
Fastest 16-Bit Sampling ADC
Linear Technology’s recently introduced LTC1604 is the fastest, highest performance 16-bit sampling ADC on the market. This device samples at 333ksps and delivers excellent DC and AC performance. The LTC1604 operates on ±5V supplies and typically dissipates just 220mW. It has a fully differential input sample-and-hold and an onboard reference. Two power shutdown modes, NAP and SLEEP, reduce power consumption to 7mW and 10μW, respectively. At 333ksps, this 16-bit device not only offers performance superior to that of the best hybrids, but does so with low power, the smallest size, an easy-to-use parallel interface and the lower cost of a monolithic part. It is available in a tiny 36-pin SSOP package. Some of the key features of this new device include:
- 333ksps throughput
- 16 bits with no missing codes and ±2LSB INL
- Low power dissipation and power shutdown (10μW in SLEEP mode)
- Excellent AC performance: 90dB SINAD and –100dB THD
- Small 36-pin SSOP package
These features of the LTC1604 can simplify, improve and lower the cost of current data acquisition systems and open up new applications that were not previously possible because no similar parts were available.
Outstanding DC and AC performance
As shown in Figure 1, the LTC1604 combines a high performance differential sample-and-hold circuit with an extremely fast successive-approximation ADC and an on-chip reference. Together, they deliver an excellent combination of DC and AC performance.
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Figure 1. The 333ksps, 16-Bit ADC Features a True Differential S/H with Excellent Bandwidth and CMRR.
The DC specifications include 16-bit with no missing codes and ±2LSB integral nonlinearity error, all guaranteed over temperature. The ADC includes an on-chip, curvature corrected bandgap reference. Figures 2a and 2b show the LTC1604’s exceptional INL and DNL error.
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Figure 2. The LTC1604 Achieves Excellent INL (2a) and DNL (2b) without Cumbersome Autocalibration.
In addition to its outstanding linearity, the LTC1604 provides exceptional spectral purity at 333ksps; better than 90dB SINAD and –100dB THD for a 20kHz input and 89dB SINAD and –96dB THD for a 100kHz input (Figure 3). Figure 4 shows how well the converter’s signal-to-noise plus distortion ratio (SINAD) holds up as the input frequency is increased.
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Figure 3. SINAD is Over 90dB and THD is –100dB at Low Input Frequencies. Even with 100kHz Inputs, SINAD Remains 89dB and THD is –96dB as Shown.
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Figure 4. The Wideband S/H Captures Signals Well Beyond Nyquist.
Differential Inputs Reject Common Mode Noise
Getting a clean signal to the input of an ADC, especially a 16-bit ADC, is not an easy task in many systems. In a single-ended sampling system accuracy and dynamic range can be limited by ground noise. When a single-ended signal is applied to an ADC’s input, the ground noise adds directly to the applied signal. Although a filter can reduce this noise, this does not work for in-band noise or common mode noise at the same frequency as the input signal. Figure 5 shows how the LTC1604 provides relief. Because of its excellent CMRR, the LTC1604’s differential inputs reject ground noise, even at the frequency of the desired input signal. Further, the LTC1604’s wideband CMRR can eliminate high frequency noise up to 1MHz and beyond.
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Figure 5. The LTC1604’s Differential Inputs Reject Common Mode Noise by Measuring Differentially.
Applications
The performance of the LTC1604 makes it very attractive for a wide variety of applications, such as digital signal processing, PC data acquisition cards, medical instrumentation and high resolution or multiplexed data acquisition.
With its excellent dynamic performance and linearity, and high sample rate the LTC1604 is the ideal ADC for high speed, 16-bit DSP and PC data acquisition card applications.
Applications such as single-channel or multiplexed high speed data acquisition systems benefit from the LTC1604’s high sample rate and high impedance inputs. The high sample rate allows designers to multiplex more channels of a given bandwidth than slower 16-bit ADCs while meeting the demands of a low power budget.