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Results on EngineerZone

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    1. Lack of available information

      Forum Thread
      Answered
      Power Management
      13 June, 2025
      The current revision of the MAX25500 datasheet lacks almost all important information about the component. How should one obtain it?
      Datasheet/SpecsMAX25500LED Driver Support FunctionsLED Driver IC

    2. AD936x: Manual RX Gain Control Not Reflecting Set Value

      Forum Thread
      Answered
      Design Support AD9361/AD9363/AD9364
      12 June, 2025
      Hi, I am currently using the AD9361 No-OS codebase to evaluate the AGC (Automatic Gain Control) functionality, specifically focusing on manual mode. After successfully initializing the AD9361, I set the AGC to manual mode using the ad9361_set_rx_gain_control_mode API. I then attempted to set the …
      softwarenoosad93612021.2Wideband Transceiver ICRF Integrated Transceivers

    3. ADRV9002 frequency hopping pointer

      Forum Thread
      Answered
      Design Support ADRV9001 – ADRV9007
      11 June, 2025
      I started SDR project with ADRV9002. I am using frequency hopping for sweep procedure. Question 1: How do I ensure the first hop always starts from Table A, Row 1? Is there any kind of reset of internal hopping pointer? Question 2: Can I read actual internal hopping pointer?
      hardwareADRV9002frequency hoppingWideband Transceiver ICRF Integrated Transceivers

    4. Why is TES not setting the ADI_ADRV9001_INIT_CAL_RX_HPADC_RC during initial calibration ?

      Forum Thread
      Answered
      Design Support ADRV9001 – ADRV9007
      11 June, 2025
      From the description, it would appear that the ADI_ADRV9001_INIT_CAL_RX_HPADC_RC initial calibration option is a 'must have', and yet the code generated by TES does not use this option ?
      softwareADRV9004?Wideband Transceiver ICRF Integrated Transceivers

    5. Issue with Output Frequency in Down Converter Custom Design

      Forum Thread
      Answered
      RF and Microwave
      11 June, 2025
      Dear Team We have developed a custom design utilizing the LTC5552, with an RF input at 14 GHz and an LO input at 15 GHz. The expected output is around 1 GHz in differential mode (i.e., IF+ and IF-). However, instead of observing the expected 1 GHz intermediate frequency …
      LTC5552Phase ShifterssinglehardwareRF Mixersdoubleadar1000Beamformersdown converterand Vector Modulators

    6. What does the "&" symbol after the date code mean?

      Forum Thread
      Answered
      Interface and Isolation
      11 June, 2025
      What does the "&" symbol after the date code mean?
      Datasheet/Specsadm2483Digital Isolation TechnologyADM2483BRWZIsolated RS-485

    7. How to confirm a part Topmark of ADI/MAXIM brand?

      Forum Thread
      Answered
      How to Use EngineerZone
      11 June, 2025
      Hi ! I am new here! Is there any website or documents i can confirm the a part's topmark or confirm part number from a ADI topmark?

    8. Can AD7606C-16 be a drop-in replacement of AD7606C-18

      Forum Thread
      Answered
      Precision ADCs
      10 June, 2025
      The current design uses AD7606C-18 chips with 8 DOUT lines serial interface. Due to availability issue, we would like to know if an AD7606C-18 can be replaced with an AD7606C-16 without changing the firmware when reading the ADC data. i.e. would sending 18 SCLK clocks when …
      ad7606C-16hardwareSimultaneous Sampling A/D ConvertersPrecision A/D Converters

    9. adrv9026 +ZCU102 HDL no-OS reference design (Vivado)

      Forum Thread
      Answered
      FPGA Reference Designs
      10 June, 2025
      I have successfully build and generated bit stream for adrv9026 +ZCU102 VIvado 2024.2 reference design However, looking at the design I noticed there does not seems to be support for Orx data to FPGA. Only Tx and Rx paths are there. I can see that in another case you …
      ADRV9026hardwareWideband Transceiver ICRF Integrated Transceivers

    10. Adrv9026 Vivado design 2024.2 Timing error message

      Forum Thread
      Answered
      FPGA Reference Designs
      10 June, 2025
      I have managed to generate bit stream successfully for the design. However, I see this timing relating error message. How much I should worry about this? see below the error GENERATE_REPORTS: Power analysis files won't be generated because ADI_GENERATE_XPA env var is not setINFO: [Timing 38 …
      ADRV9026hardwareWideband Transceiver ICRF Integrated Transceivers