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    1. ADF4360-0
      Production
      Product
      Integer-N PLL
      Integrated Integer-N Synthesizer/VCO Output Frequency 2400-2725
      ADF4360-0

      PDF

      Datasheet

      Documentation

      Ask the Community

      Sample & Buy

      Sample & Buy

    2. EVAL-ADF4360-0
      Evaluation Board & Kit
      The EV-ADF4360-0EB1Z evaluation board is designed to allow the user to evaluate the performance of the ADF4360-0 frequency synthesizer consisting of an integrated PLL and VCO. It contains the ADF4360-0BCPZ, a USB connector, and SMA connectors for the RF outputs. Unpopulated SMA footprints are available for the power supplies, the chip enable (CE), and the external reference input. The evaluation board also contains the loop filter to complete the PLL. It …
      EVAL-ADF4360-0

      Documentation

    3. UG-095: Evaluation Board User Guide for ADF4360-0
      User Guide

      PDF

      UG-095: Evaluation Board User Guide for ADF4360-0

      211 kB

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      1. ADF4360-7: The condition of the specification of Output Power. (2)

        Forum Thread
        Answered
        RF and Microwave
        07 November, 2024
        Hello,This is a question related to "">ez.analog.com/.../adf4360-7-the-condition-of-the-specification-of-output-power"The customer is asking about Figure 30 in ADF4360-7's datasheet. It is described on page 24 as follows. "This gives approximately &minus;2 dBm output power across the specific …
        hardwareInteger-N PLLadf4360-7Phase Locked Loop (PLL) Synthesizer &amp; Translation Loop

      2. ADF4360-7: The condition of the specification of Output Power.

        Forum Thread
        Answered
        RF and Microwave
        24 October, 2024
        Hello,I have a question from our customer about ADF4360-7.The customer asks about the difference between the specification and the real value of the output power.The output power range is specified in Table on page 4 of the datasheet. Output Power: -14/-5 dBm typ. conditions: VCO …
        Datasheet/SpecsInteger-N PLLadf4360-7Phase Locked Loop (PLL) Synthesizer &amp; Translation Loop

      3. EV-ADF4360-7EB1Z: output matching circuit

        Forum Thread
        Answered
        RF and Microwave
        09 September, 2024
        Hello,I have a quetion from a customer about output matching in EV-ADF4360-7EB1Z.There are difference between figure 30 of the datasheet and the output maching circuit od evaluation board.in figure 30; shunt inductor ... 47nH series capacitor ... 3.9pF series inductor ... 7.5nHin evaluation board; shunt inductor …
        Datasheet/SpecsInteger-N PLLadf4360-7Phase Locked Loop (PLL) Synthesizer &amp; Translation Loop

      4. ADF4360-7 Leakage current

        Forum Thread
        Answered
        RF and Microwave
        05 August, 2024
        Hello,Our customer has a question about the leakage current setting for ADIsimPLL to simulate the ADf4360-7 function.What value should be used for leakage current for ADF4360-7?Best regards,y_suzuki
        Datasheet/SpecsInteger-N PLLadf4360-7Phase Locked Loop (PLL) Synthesizer &amp; Translation Loop

      5. ADF4360: Characteristic of temperature vs. output power

        Forum Thread
        Answered
        RF and Microwave
        29 July, 2024
        Hello,I have a request from our customer about the output power characteristics of ADF4360-7.Our customer requires a temperature characteristic of the output power.Please let me know if you know(have) the temperature vs. output power characteristic.Best regards,y_suzuki
        Datasheet/SpecsInteger-N PLLadf4360-7Phase Locked Loop (PLL) Synthesizer &amp; Translation Loop

      6. Need guidance on SPI control of ADF4360

        Forum Thread
        Answered
        RF and Microwave
        04 July, 2024
        The datasheet for the ADF4368 shows an SPI register map, but does not give any information about the structure of the SPI comms. What are the SPI parameters, such as polarity and clock phase? Is there a command byte, and if so what are the available commands? If there is …
        Datasheet/SpecsFractional-N PLLADF4368Phase Locked Loop (PLL) Synthesizer &amp; Translation Looprf and microwave

      7. What is the storage temperature range for the ADF4360-7? The ADF4360-9 in the same series, have formal spec on storage temperature (-65 deg C ~ 150 deg C).

        Forum Thread
        Answered
        RF and Microwave
        11 March, 2024
        What is the storage temperature range for the ADF4360-7? The ADF4360-9 in the same series, have formal spec on storage temperature (-65 deg C ~ 150 deg C).
        Datasheet/SpecsInteger-N PLLadf4360-7Phase Locked Loop (PLL) Synthesizer &amp; Translation Looprf and microwaveadf4360-9

      8. ADF4360-9 RFOUTA and RFOUTB Pull Up voltages

        Forum Thread
        Answered
        RF and Microwave
        10 January, 2024
        Hi all, I want to use ADF4360-9 to generate signals from 1MHz to 150MHz using the RFOUT pins. I see from datasheet that both the RFOUTA and RFOUTB pins are in open collector configuration. What voltages can I use there if I need frequencies upto 200MHz? Thanks. Emil
        hardwareadf4360Integer-N PLLPhase Locked Loop (PLL) Synthesizer &amp; Translation Looprf and microwaveadf4360-9rfout

      9. ADF4360-8 Compensation Node

        Forum Thread
        Answered
        RF and Microwave
        02 October, 2023
        Using the ADF4360-8 in a FM modulation scenario generating a VHF carrier with an audio signal tied into the VTUNE pin. Loop filter is configured with a cutoff frequency of 100Hz to allow the audio to pass through the PLL. As the FM deviation is increased above 20kHz, the …
        hardwareInteger-N PLLpll vcofm modulationvtuneadf4360-8Phase Locked Loop (PLL) Synthesizer &amp; Translation Loopvco sensitivityrf and microwaveN/A

      10. ADF4360-9 DIVOUT specification

        Forum Thread
        Answered
        RF and Microwave
        05 July, 2023
        Hi, I'm considering ADF4360-9. I have two question. I would like to divide the VCO and output it from DIVOUT. I checked below question. DIVOUT of ADF4360-9 ① What are the High/Low specifications for the DIVOUT output signal? ② I have checked with the evaluation board …
        hardwareInteger-N PLLPhase Locked Loop (PLL) Synthesizer &amp; Translation Looprf and microwaveadf4360-9

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