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  1. MT-098: Low Voltage Logic Interfacing
    Tutorial

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    206 kB

  2. High Speed Design Techniques, 1996
    Technical Book
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Results on EngineerZone

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    1. CFR hard clipping

      Forum Thread
      Answered
      Design Support ADRV9026/ADRV9029
      09 May, 2025
      Regardless of the EVM performance, is it possible to enable only the hard clipping and not enable the other three CFR engines? adi_adrv9025_CfrHardClipperConfig_t cfrHardClipperConfig; cfrHardClipperConfig.cfrHardClipperEnable = 1; cfrHardClipperConfig.txChannelMask = tx_mask; cfrHardClipperConfig.cfrHardClipperThreshold = 0.5; printf("chan: %d th: %f \n", cfrHardClipperConfig.txChannelMask , cfrHardClipperConfig.cfrHardClipperThreshold); if (ADI …
      softwareadrv9025

    2. Technical Support for AD9576

      Forum Thread
      Answered
      Clock and Timing
      09 May, 2025
      Dear AD Team, We want to use for 10MHz to 16.369MHz conversion operation in My Project. What is hardware configuration needs to follow and software driver to configure the PLL. Is it have any preset configuration needs to follow? How much complexity in the software and we are using …
      Clock Generation and DistributionhardwareClock Distribution Devicesclock and timingAD9576

    3. RXD pin is low when DE&RE is driven High

      Forum Thread
      Answered
      Interface and Isolation
      08 May, 2025
      pins DE and RE are connected together, when transmiting on tx and both pins are high the Rx falls to GND causing frame error at uart. is there a reason for this behavior? is it intended or a bug?
      hardwareadm2483Digital Isolation TechnologyADM2483BRWZIsolated RS-485rs485 transceivers

    4. School Project

      Forum Thread
      Answered
      LTspice
      08 May, 2025
      Design an op amp circuit to perform the following operation: vo = 3.5v1 - 2.5v2. All resistances must be <= 100k. The power supply should be +15V and -15V. Let v1 = 2V and v2 = 1V. I need help designing an op amp on LTSpice for a school project that counts as …
      Operational Amplifiers (Op Amps)simulationsoftware24.1.1LTspice

    5. AD9364 start-up RF spike

      Forum Thread
      Answered
      Design Support AD9361/AD9363/AD9364
      07 May, 2025
      When initialising the AD9364, I see a rather strong RF spike at the expected TX frequency for a few milliseconds (around 0 dBm), which then descends to the expected level.My init sequence after FIR setup, sampling freqs etc is in general terms:SetAfcDefault();SetRxFrequency(rxFreq);SetTxFrequency(txFreq);SetTxAttenuation(txAttn …
      hardwareWideband Transceiver ICrfad9364RF Integrated Transceivers

    6. how to receive undetermined length data through UART?

      Forum Thread
      Answered
      Precision Microcontrollers
      07 May, 2025
      I want to receive data with UART. The data could be 10 byte, 20 byte, 30 byte. COMRX is only 8 bit=1byte. When COMRX is full, it will generate an interrupt, then I'll read COMRX in the interrupt service routine software code. But how can I know the …
      softwaremicrocontrollersPrecision Microcontrollersaducm360

    7. ESD Protection

      Forum Thread
      Answered
      Interface and Isolation
      07 May, 2025
      In the block diagram below, I'm using an isolated RS422(ADM2390EBRWZ) transceiver. My system includes the diodes shown in the diagram, but there is no GDT between the two isolated grounds. During ESD testing with an ESD gun, the TVS diodes were ineffective, and my system suffered significant damage …
      adm2490ehardwareDigital Isolation TechnologyIsolated RS-485ADM2490EBRWZ

    8. Applying Hamming windowing to adc data before FFT block

      Forum Thread
      Answered
      FPGA Reference Designs
      07 May, 2025
      hi, i am trying to implement hamming windowing for adc data before fft block, i have generated .coe files using python hamming function and created BROM IP core and loaded the .coe file. please refer attached image. i am not getting correct data, how to verify this design and any …
      software2018.3

    9. HMC625BLP5E settling time and rise/fall time

      Forum Thread
      Answered
      RF and Microwave
      07 May, 2025
      Hi Folks, Currently we are evaluating HMC625BLP5E, but the data sheet doesn't show the parameter of setting time and rise/fall time. Could the parameter refer to HMC624A or here has any related information to be evaluated? Thanks.
      Datasheet/SpecsvgaDigital Step Attenuatorshmc625bDigital Control VGAshmc625blp5eattenuatorsVariable Gain Amplifiers (VGA)attenuator

    10. Lack of recognition of custom-made LIB CMP files with new software version # 24.1.6.

      Forum Thread
      Answered
      LTspice
      06 May, 2025
      The new version of LT Spice # 24.1.6 does not recognize my custom LIB CMP files but the older version # 24.0.11 does. For years I have generated custom SYM components stored within custom SYM files along with their associated custom component CMP files. Circuits analysis always worked …
      software24.1.6Not applicable