Home
Search
left arrow Back to Home
Magnifying Glass Icon close icon

You searched for “JESD204”

Filters

Filter Icon

Filters

Expand or Collapse Filter Icon
Expand or Collapse Filter Icon
Product Categories
  • A/D Converters (ADC) 88
  • Amplifiers 6
  • Analog Functions 2
  • Audio Products 1
  • Clock and Timing 37
Expand or Collapse Filter Icon
Resources
  • Application Note 5
  • Data Sheet 104
  • Design Tools 3
  • Education 2
  • Evaluation Board 42
Expand or Collapse Filter Icon
Industry Solutions
  • Aerospace and Defense Systems 113
  • Automotive Solutions 5
  • Consumer Technology Solutions 4
  • Data Center Solutions 1
  • Energy Solutions 8
Expand or Collapse Filter Icon
Tools and Models
  • 5
  • 4
  • 3
Expand or Collapse Filter Icon
Technology Solutions
  • Gigabit Multimedia Serial Link (GMSL) Technology 1
  • Power Solutions 2
  • Precision Technology Solutions 2
  • Radio Frequency (RF) Solutions 24
Expand or Collapse Filter Icon
Site Section
  • 324
  • 19
  • 2
Expand or Collapse Filter Icon
Result Type
  • 31
  • 7
  • 31
  • 4,820
  • 1,947
  • 10
  • 8
Expand or Collapse Filter Icon
Groups, Forums & Libraries
  • 2
  • 17
  • 5
  • 2
  • 135
  • 5
  • 300
  • 2
Expand or Collapse Filter Icon
Author
  • 466
  • 207
  • 45
  • 29
  • 44
  • 65
  • 34
  • 36
Expand or Collapse Filter Icon
Tag
  • 657
  • 650
  • 650
  • 509
  • 471
  • 357
  • 351
  • 351
Analog Devices Inc. logo Results on Analog.com
450
engineer-zone-play-icon Results on EngineerZone
6,854

Results on Analog.com

450
Relevance
Relevance
Oldest First
Newest First

Sort by

    Clear All Filters Icon
    External Link Icon Right Arrow Icon External Link Icon External Link Icon Tag pst-icon
    1. Powering GSPS or RF Sampling ADCs: Switcher vs. LDO
      Technical Articles
      Nov 1, 2015

      Umesh Jayamohan

      The analog-to-digital converter (ADC) is an integral component in any system that depends on gathering information from the outside (analog) world for (digital) processing.
    2. AD9175: Dual, 11-Bit/16-Bit, 12.6 GSPS RF DAC with Wideband Channelizers Data Sheet
      Data Sheet
      The AD9175 is a high performance, dual, 16-bit digital-to- analog converter (DAC) that supports DAC sample rates up to 12.6 GSPS.

      PDF

      AD9175: Dual, 11-Bit/16-Bit, 12.6 GSPS RF DAC with Wideband Channelizers Data Sheet

      2.95 M

    3. New RF DAC Broadens Software-Defined Radio Horizon
      Analog Dialogue

      Daniel E. Fague

      This article explores in detail ADI’s new RF DAC architecture, applications, and performance.
    4. ADRV9026: Integrated, Quad RF Transceiver with Observation Path Data Sheet
      Data Sheet
      The ADRV9026 is a highly integrated, radio frequency (RF) agile transceiver offering four independently controlled transmitters, dedicated observation receiver inputs for monitoring each transmitter channel, four independently controlled receivers, integrated synthesizers, and digital signal processing functions providing a complete transceiver solution.

      PDF

      ADRV9026: Integrated, Quad RF Transceiver with Observation Path Data Sheet

      2.92 M

    5. AN-2065: Optimizing RF Performance of the AD9081 and AD9082
      Application Note
      The AD9081 and the AD9082 mixed signal front-end (MxFE®) devices are high-performance, highly-integrated RF digital-to-analog converters (DAC) and RF analog-to-digital converters (ADC) used in many applications.
    6. MAX5871EVKIT: Evaluation Kit for the MAX5871 Data Sheet
      Data Sheet
      The MAX5871 evaluation kit (EV kit) contains a single MAX5871 high-performance interpolating and modulating 16-bit 5.

      PDF

      MAX5871EVKIT: Evaluation Kit for the MAX5871 Data Sheet

      6.00M

    7. MAX5869 Reliability Data
      Reliability Data

      PDF

      max5869 Reliability Data

      120.41K

    8. UG-1238: ADRV-DPD1/PCBZ Small Cell Radio Reference Design with Digital Predistortion
      User Guide
      The ADRV-DPD1/PCBZ is a 24 dBm per path, 2 × 2 multiple input, multiple output (MIMO) radio board, which uses the AD9375, a highly integrated radio frequency (RF) transceiver with integrated digital predistortion (DPD).

      PDF

      UG-1238: ADRV-DPD1/PCBZ Small Cell Radio Reference Design with Digital Predistor

      5.53 M

    9. UG-992: AD9371/AD9375 System Development User Guide
      User Guide
      This user guide is the main source of information for systems engineers and software developers using the AD9371 family of software defined radio transceivers. This family includes the AD9371 and the AD9375.

      PDF

      UG-992: AD9371/AD9375 System Development User Guide

      11.27 M

    10. ADRV9008-1: Integrated Dual RF Receiver Data Sheet
      Data Sheet
      ADRV9008-1 Data Sheet

      PDF

      ADRV9008-1: Integrated Dual RF Receiver

      2.32 M

    • <<
    • <
    • 33
    • 34
    • 35
    • 36
    • 37
    • >
    • >>

    Results on EngineerZone

    6,854
      Clear All Filters Icon
      1. Trying to implement jesd204b protocol between ADRV9009 and ZC706 using TCL files provided by EngineerZone.

        Forum Thread
        Answered
        FPGA Reference Designs
        23 February, 2024
        Hi, I have downloaded the TCL files from GITHUB available in the following link for building sample vivado example project for ADRV9009 ON ZC706 Releases &middot; analogdevicesinc/hdl (github.com) Tools used: 1.Vivado 2019.1 2.Tried in both windows and Linux environment. Trying to implement but couldn't figure …
        jesd204softwarezc706adrv9009Vivado2019.1Wideband Transceiver ICrf and microwaveRF Integrated Transceivers

      2. Using JESD204 Analog Drivers for a custom board

        Forum Thread
        Answered
        Linux Software Drivers
        28 November, 2022
        Hi everyone, I am using AD JESD204 IP's to implement the interface on a custom board. I have tested the design with a baremetal program and everything works fine. Now, I want to integrate my design with an embedded Linux to use the JESD204 drivers, I use petalinux to …
        jesd204software2021.1driverslinux

      3. AD9081: Unable to get JESD204C ADC mode 27.0 , DAC mode 20 working.

        Forum Thread
        Answered
        Software Interface Tools
        24 October, 2022
        … adc.decimation sys.converter.dac.sample_clock = 4000000000 / sys.converter.dac.interpolation mode_tx = "20" mode_rx = "27.0" So I am using the following JESD204C setups: 'jesd_adc': {'CS': 0, 'F': 3, 'HD': 0, 'K': 256, 'L': 8, 'M': 4, 'Np': 12, 'S': 4, 'bit_clock': 12375000000.0, 'converter …
        jesd204softwarepyadi-jifpyadi-jif (latest)zcu102AD9081zynqmp-zcu102-rev10-ad9081 reference designAD9081-FMCA-EBZHigh Speed A/D Converters &gt;10 MSPSMixed-Signal Front Ends (MxFE)

      4. How to control JESD204B in AD9081

        Forum Thread
        Answered
        Mixed-Signal Front Ends (MxFE)
        01 August, 2022
        HI, I am having trouble controlling JESD204B in AD9081. The JESD204B Setting for controlling the four DACs is as follows. JESD MODE 16L 8M 16F 4S 1K 32N 16Daterate 250MSPSLanerate 10GHzTOTAL_INTEPOLATION 12x4 The JESD204B structure I think is as shown in the figure.   (L = 8, M = 16, F = 4 …
        jesd204softwareAD9081jesd204b

      5. JESD204 setting for ZCU102+AD9083 HDL reference

        Forum Thread
        Answered
        FPGA Reference Designs
        16 February, 2022
        Hi all, I'm using AD9083 on ZCU102 HDL reference design (wiki.analog.com/.../ad9083_evb_reference_hdl) with . Linux driver, and trying to modify it so that the sampling rate per converter becomes 160Msps as follows. AD9083 EBZ setting in dtsi: - CIC decimation: bypassed - J decimation: 12 - PLL_ref …
        jesd204hdl reference designzcu102High Speed A/D Converters &gt;10 MSPSStandard High Speed A/D ConvertersAD9083

      6. JESD204 FSM Topology Question

        Forum Thread
        Answered
        Linux Software Drivers
        4/1/2021 2:19:42 PM
        … on only the TX transport layer axi_adrv9009_core_tx, and the axi_adrv9009_core_tx entry DOES have a jesd204-device property. &trx3_adrv9009 { jesd204-device; #jesd204-cells = ; jesd204-inputs = , , ; /delete-property/ interrupts; adi,jesd204-framer-a-lmfc-offset = ; }; &axi_adrv9009_core_tx { jesd204-device; #jesd204-cells = ; jesd204-inputs …
        jesd204devicetreeadrv9009fmcomms8Wideband Transceiver ICRF Integrated Transceivers

      7. ad9680 failed to enable JESD204 link for hdl_2019_r2 branch

        Forum Thread
        Answered
        FPGA Reference Designs
        26 February, 2021
        … vivado hls 2019.1 - petalinux 2019.1 An image was successfully built without errors. But when I boot this image, the ad9680 failed to enable JESD204 link. This is shown in the following dmesg log. Thus I can not get any signals on iio scope display. I appreciate any suggestion …
        ad9680Clock Generation Devicesad9523jesd204Standard High Speed D/A ConvertersClock Generation and Distributionspi problemadv7511clock and timingHigh Speed D/A Converters =30MSPS

      8. JESD204B/C Mode Selector Tool

        Forum Thread
        Answered
        Mixed-Signal Front Ends (MxFE)
        24 January, 2021
        Hello there,Datasheet for AD9082 mentions about JESD204B/C Mode Selector Tool.Could you please share the link where I can download it?Cheers,Taras.
        jesd204AD9081High Speed A/D Converters &gt;10 MSPSMixed-Signal Front Ends (MxFE)AD9082

      9. Connecting MxFE JESD204B in Loopback/No Processor

        Forum Thread
        Answered
        Mixed-Signal Front Ends (MxFE)
        02 December, 2020
        Hello there, I was interested in seeing if we could naively connect integrated transceivers together via JESD240B, but without having a processor in between them. Is there any reason I would need a FPGA/Processor in between? Specific use case is having AD9081 or AD9082 connected "back to back" on …
        jesd204AD9081High Speed A/D Converters &gt;10 MSPSMixed-Signal Front Ends (MxFE)AD9082

      10. ad9680 jesd204b fpga

        Forum Thread
        Answered
        High-Speed ADCs
        13 July, 2020
        The devices I am using are the ad9680 evaluation board and the zcu102 evaluation board, and the two are connected through the FMC connector and the JESD204B protocol.I want to do the following. After powering on, don't give ad9680 the sampling clock first, and then wait for some …
        ad9680jesd204sampling clockHigh Speed A/D Converters &gt;10 MSPSStandard High Speed A/D Convertersfpga

      • <<
      • <
      • 1
      • 2
      • 3
      • 4
      • 5
      • 6
      • 7
      • >
      • >>
    • Who We Are
    • Careers
    • Newsroom
    • What We Do (Signals+)
    • Investor Relations
    • Quality & Reliability
    • Sales and Distribution
    • What's New on Analog.com
    • Contact Us
    • Support
    • EngineerZone
    • Resources
    • Wiki
    • Analog Dialogue
    • ADI Developer Portal
    • Legal and Risk
    • Accessibility
    • Privacy Policy
    • Privacy Settings
    • Cookie Settings
    • EZ
    • Linkedin
    • Instagram
    • Youtube
    • Facebook
    • Twitter