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  1. TNJ-049
    Technical Articles
  2. EVAL-AD2428WD1BZ
    Evaluation Board & Kit
    An Automotive Audio Bus (A2B®) system consists of a single main node and at least one subordinate node, where the transceiver at the host controller is the main node. The main transceiver generates clock, synchronization, and framing for all subordinate nodes and is programmable over a control bus (I2C) for configuration and readback. An extension of this control bus is embedded in the A2B data stream, which enables the host to directly access subordinate …
    EVAL-AD2428WD1BZ

    Documentation

  3. SHARC Audio Module (ADZS-SC589-MINI)
    Evaluation Board & Kit
    The SHARC® Audio Module is an expandable hardware/software platform that enables project prototyping, development and deployment of audio applications including effects processors, multi-channel audio systems, MIDI synthesizers, and many other DSP-based audio projects. The centerpiece of the SHARC Audio Module is the  Analog Devices ADSP-SC589 SHARC processor, a remarkable engine for  audio processing which incorporates dual SHARC+ DSP cores and an ARM  core. Accompanying the SHARC is an expert selected …
    SHARC Audio Module (ADZS-SC589-MINI)

    Documentation

  4. Precision Products and Signal Chain Solutions: Selection Guide 2019
    Product Selection Guide
    We have created this combined precision signal chain selection guide to give you quick and easy access to information on our latest industry-leading, high performance products so you can find the best and newest parts for your complete signal chain designs.

    PDF

    Precision Technology Selection Guide 2018

    13.38 M

  5. MT-230: Noise Considerations in High Speed Converter Signal Chains
    Tutorial

    PDF

    MT-230: Noise Considerations in High Speed Converter Signal Chains

    255 kB

  6. TNJ-072_study_about_FDNR_03
    Technical Articles
  7. TNJ-071_study_about_FDNR_02
    Technical Articles
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Results on EngineerZone

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    1. AD9576 Eval board SPI configuration support and frequency conversion with dual PLL

      Forum Thread
      Answered
      Clock and Timing
      17 June, 2025
      Hi Team, Here we are trying to configure AD9576 eval board. We need your support in configuring the SPI communication ( Pins in Eval board hardware and the setting to be used in ACE installer). Also can you please assist in, 1. To convert the on-board crystal Ref input 25MHz …
      Clock Generation and DistributionhardwareClock Distribution DevicesAD9576ACE installer

    2. Overcurrent timer capacitor limitation for longer period

      Forum Thread
      Answered
      Power Management
      17 June, 2025
      Hi, I know there is a timer capacitor that controls overcurrent limit time before it shuts off the system. My application will require to handle up to 3A and remain 3A for around 20 seconds before it trips. Based on my requirement, timer capacitor seems way to big, which I …
      Datasheet/Specscurrnet limiterhot swap controllerhigh voltage surgeand Protectionpower monitorltc4363LT4363surge stoppercontrol

    3. We are using the ADE9103 to measure DC only. When we read the x_wav_x registers do we need to apply some math to the reading? Also is there any code examples of this math that needs to be done.

      Forum Thread
      Answered
      Energy Monitoring and Metering
      16 June, 2025
      When we read the x_wav_x registers do we need to apply some math to the data we read from that register? is there any calibration required? I_WAV_HI, I_WAV_MD, I_WAV_LO V1_WAV_HI, V1_WAV_MD, V1_WAV_LO V2_WAV_HI, V2 …
      ADE9103softwareNone listed on GitHub

    4. Dual modulus PLL programming

      Forum Thread
      Answered
      Clock and Timing
      16 June, 2025
      Hello. We are involved in the design of a system which needs several very low jitter coherent clock signals and due to the frequencies needed I selected this chip. The needed output clocks are to be generated from a ultra low noise 50MHz TCXO clipped SW 0.8Vpp reference, probably …
      Clock Generation DevicesStandard High Speed D/A ConvertersDatasheet/SpecsClock Generation and Distributionad9516-4High Speed D/A Converters =30MSPSHigh Speed A/D Converters &gt;10 MSPSStandard High Speed A/D Converters

    5. ADXL382 twice the stated frequency

      Forum Thread
      Answered
      MEMS Inertial Sensors
      16 June, 2025
      Hi, I'm having some issues with the FIFO buffer on the ADXL382. I'm getting twice as many XYZ samples as expected. I have tried VLP and ULP mode. They should be 500 Hz and 50 Hz according to the datasheet, but I receive data from the FIFO buffer …
      softwarebandwidthfrequencyADXL382

    6. No basic components found in LTSpice anymore

      Forum Thread
      Answered
      LTspice
      15 June, 2025
      I've been using LTSpice for years on Windows 10 64 bit, upgrading it regularly. The last version I installed was LTSpice 24.0, and it was ok. Now I've updated to the latest 24.1.9 and I can't find anymore any basic model, like resistors …
      LTspice 24.1.9softwareLTspice

    7. XML Missing several key registers

      Forum Thread
      Answered
      SigmaDSP Processors & SigmaStudio Dev. Tool
      15 June, 2025
      Hi.I have made a parser in Python to handle the XML files from SigmaStudio in my Application. I noticed some wierd outputs from time to time, and it seems to be that if Fields like the PLL_CTRL1 is in "default" position(Divide by 4) then there is no …
      Audio Signal Processorssoftware4.7sigmaStudio 4.7USBi interfaceSigmaDSP Audio Processorsadau1466

    8. Reading zeros for 150ms after power-on

      Forum Thread
      Answered
      High-Speed ADCs
      14 June, 2025
      After powering on and setting initial SPI registers, I get all zeros from AD9637 for about 150ms. The sample clock is a 65MHz LVDS oscillator, and clock divider register set to 4 for 16.25MSPS. I tried reading back all SPI registers in a loop after powering on, and after …
      hardwaread9637High Speed A/D Converters &gt;10 MSPSStandard High Speed A/D Converters

    9. adrv9361-z7035 Timing Failure

      Forum Thread
      Answered
      FPGA Reference Designs
      13 June, 2025
      I pulled the latest git repo and attempted to build the unmodified adrv9361z7035/ccfmc_lvds project using Vivado 2024.2. However, after building the image I received a message that the design failed to meet the timing requirements. All I did was update my local repo with "git pull" and …
      hardwareadrv9361z7035timingad9361Wideband Transceiver ICRF Integrated Transceivers

    10. Lack of available information

      Forum Thread
      Answered
      Power Management
      13 June, 2025
      The current revision of the MAX25500 datasheet lacks almost all important information about the component. How should one obtain it?
      Datasheet/SpecsMAX25500LED Driver Support FunctionsLED Driver IC

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