MAXREFDES161

Introduction

Many applications ranging from microwave radio to wireless infrastructure require high-frequency clock generation. Additionally, a programmable output frequency is essential for applications such as software-defined radio or test-measurement systems. The MAXREFDES161# frequency synthesizer shield provides a simple and cost-effective solution to ultra-wideband frequency generation based on the MAX2871, an integrated fractional- integer-N phase-locked loop (PLL) and voltage-controlled oscillator (VCO).

Detailed Description

Figure 1 is a block diagram of the MAXREFDES161#.

The MAX2871 achieves its programmable output frequency range of 23.5MHz to 6GHz by combining a bank of integrated VCOs covering 3000MHz to 6000MHz, with output divider ratios from 1 to 128. An internal fractional- or integer-N divider divides the output frequency, which is then compared with an on-board 50.0 MHz reference oscillator input using a phase frequency detector (PFD). The PFD has a charge pump output architecture, which, after passing through an external loop filter, is applied to the VCO input to close the feedback loop and provide an ultra-low phase noise output frequency. The third order loop filter was designed with a bandwidth of 40kHz. Alternate loop filters can be simulated using the pin-compatible MAX2870 model available in EE-Sim.

Low-Noise Power Supplies

The MAX2871 provides separate V_CC inputs for various internal blocks to provide users with the ability to control the filtering and bypassing of each supply. The MAX8559 is a dual output LDO with 32µV_RMS output noise. Two MAX8559 ICs are used to provide four separate outputs, one each for VCC_VCO, VCC_PLL, VCC_TCXO, and VCC_DIG. Because the MAXREFDES161# can consume up to 200mA with both outputs enabled and set to full power, the LDOs are powered from the +5V input on the shield , which can typically provide more current than the +3.3V input on most Arduino/Mbed platforms. While this causes the LDOs to consume more power, it provides the MAXREFDES161# with a more reliable power-generation scheme.

Logic Level Translation

To maximize compatibility with more platforms, logic level translators (LLT) are used to allow the MAXREFDES161# to work with both +3.3V and +5V logic levels. The IOREF pin on the shield pinout is applied to the host (VCC) side of the LLTs to ensure compatibility with the platform in use. The MAX3391E and MAX3393E were chosen because they feature unidirectional channels, which ensures users apply the appropriate signals for the desired operation. By default, the 3-wire communication interface, optional readback pin, chip enable, output enable, and lock detect pins are all connected to the shield pinouts, but many channels feature pull-up resistors and removable 0Ω series resistors to adjust the board functionality. Figure 3 shows the level translator.

The general-purpose input/output (GPIO) pins LE, CLK, and DATA are the minimum pins required to operate the MAX2871. These pins correspond to CS, SCLK, and MOSI, respectively, in typical serial peripheral interface (SPI) systems. The device has two hardware enable pins, CE and RFOUT_EN. Users can enable these pins by default and free up the GPIO needed to drive these pins, D9 and D8, by removing the 0Ω resistors on these lines. The MUX pin can be configured for register readback, which corresponds to the MISO pin in SPI nomenclature. The LD pin can be used for digital lock detection or analog lock detection with external pull-up resistor. If the host does not use these pins, the GPIOs used to drive them, D12 and D6, can be freed by removing the inline 0Ω resistors.

Reference Oscillator

The MAXREFDES161# uses a 50.0MHz input crystal oscillator to serve as the reference frequency input. Optional SMA connector pads are provided if users wish to apply a reference frequency from another input source. Additional optional pads are provided for easy termination or attenuation networks. Instead of hardwiring the V_CC and E/D pins of the crystal oscillator, pass-through and pull-up resistors are used to allow for board modifications for a given application.

RF Output Bias and Termination

Each RF output on the MAX2871 should be biased to VCC_RF through 50Ω resistor or 27nH inductor. All outputs should also be terminated to prevent unwanted oscillations. Each output on the MAXREFDES161# has a -3dB attenuation pad that is optimized for 50Ω input and output impedances. This ensures that with no 50Ω load on the output the MAX2871 still sees a termination resistance of approximately 155Ω. While this does not provide the optimal output power transfer, it does prevent outputs from oscillating due to lack of termination. The output power can be increased by replacing the attenuation network with a 0Ω series resistor and removing the shunt resistors. In this configuration, ensure no output is left unterminated or unwanted oscillations may occur.

Detailed Description of Firmware

The MAX2871 driver library provides the basic functions required to get the MAXREFDES161# initialized and outputting a chosen frequency. This library functions on Arm^® Cortex^®-M microcontrollers using the online development environment mbed.org. The library and example programs can be found at mbed.org Maxim has code written for MAX32625MBED to directly work with this shield. The MAX32625MBED includes a MAX32625 Arm Cortex-M4 microcontroller with FPU, prototyping area with adjacent access to precision analog front end (AFE) connections, I/O access through Arduino-compatible connectors, additional I/O access through 100mil x 100mil headers, USB interface, and other general-purpose I/O devices. For information on how to get started with a MAX32625MBED board, go to the following link: Getting Started with mbed. To order a MAX32625MBED board, go to the following MAX32625MBED. The demo program initializes the MAX2871 and prompts the user to input the reference frequency through a terminal window. Once the reference frequency is known, the user is prompted to enter the target output frequency. After the user inputs a value, the corresponding register settings are calculated and updated. Once the MAX2871 achieves lock on the new frequency, the achieved frequency, VCO input voltage, and selected VCO are displayed in the terminal.

Quick Start

Required Equipment

• Windows^® PC with a USB port
• MAXREFDES161#
• Arduino^® form factor microcontroller platform (Arduino or Mbed)

Procedure

The reference design is fully assembled and tested. Follow the steps below to verify board operation.

Prerequisite

You must have an Arm Mbed account. If using Mbed for the first time, set up an account and add the platform to the online compiler per the instructions on the platform’s product page.

Mbed

1. Connect MAXREFDES161# to the platform board.
2. Connect USB cable from the PC to the platform.
3. In Windows, ensure serial communication between the PC and Mbed platform is configured properly by following these instructions:

   a. Navigate to MAX2871-Synthesizer

   b. Click the “Import this program” button and import the MAX2871-Synthesizer as a “Program.”

   c. Compile and download the resulting binary to your platform.

   d. Open a terminal emulator, such as Tera Term, find the appropriate COM port for the Mbed platform, and configure the connection for 9600bps, 8-N-1 with no flow control.

   e. Ensure the terminal is configured for ‘Auto’ receive and “CR+LF” transmit and local echo should be enabled.

   f. Press the Reset button on the platform and exercise the demo of MAX2871-Synthesizer.

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