EVAL-AD9552
Overview
Features and Benefits
- Simple power connection using USB connection and on-board LDO voltage regulators
- LDOs are easily bypassed for power measurements
- AC-coupled differential LVPECL SMA connectors
- SMA connectors for
- 1 reference input
- 1 PLL lock detect output
- Microsoft Windows®–based evaluation software with simple graphical user interface
- On-board PLL loop filter
- Easy access to digital I/O and diagnostic signals via I/O header
- Status LEDs for diagnostic signals
- USB computer interface
- Dip switch configurable for manual operation
- Software calculator provides flexibility, allowing programming almost any rational input/output frequency ratio
Product Details
The AD9552 evaluation board is a compact, easy to use platform for evaluating all features of the AD9552 oscillator frequency upconverter.
The AD9552 is a fractional-N phase-locked loop (PLL) based clock generator designed specifically to replace high frequency crystal oscillators and resonators. The device employs a sigmadelta (Σ-Δ) modulator (SDM) to accommodate fractional frequency synthesis. The user supplies an input reference signal by connecting a single-ended clock signal directly to the REF pin or by connecting a crystal resonator across the XTAL pins.
The AD9552 is pin programmable, providing one of 64 standard output frequencies based on one of eight standard input frequencies. The device also has a 3-wire SPI interface, enabling the user to program custom input-to-output frequency ratios.
The AD9552 relies on an external capacitor to complete the loop filter of the PLL. The output is compatible with LVPECL, LVDS, or single-ended CMOS logic levels, although the AD9552 is implemented in a strictly CMOS process.
Markets and Technologies
Applicable Parts
Documentation & Resources
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AD9552 Schematic (Rev. D)11/16/2009ZIP215K
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UG-035: Evaluating the AD9552 Oscillator Frequency Upconverter3/1/2010PDF522 kB
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AD9552 Evaluation Board Instructions11/16/2009ZIP825 K
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AD9552 Layout (Rev. D)11/16/2009ZIP584 K