Tiny Analog Switch Alleviates I²C Address Conflicts

To avoid address conflicts, every peripheral on an I²C bus must have a unique address. Sometimes, however, peripherals can be assigned the same address. The circuit of Figure 1 resolves address conflicts by enabling the I²C bus to select between two peripherals with the same address.

The popular I²C bus is an open-collector, 2-wire interface that includes a clock line and a bidirectional data line. It allows a controller (the master) to select a particular device (the slave) by first issuing a serial address on the data line, then issuing appropriate commands or data. Master and slave can send data in both directions by pulling the data line low; slaves can generate wait states by pulling the clock line low. Bus switching, however, is complicated by the open-collector architecture; it cannot be accomplished with the CMOS outputs of AND gates or 74HC157 data selectors.

The peripherals shown in Figure 1 are a Philips^® I²C real-time clock (PCF-8583) and a large I²C EEPROM (Microchip^® M-24LC16). Both peripherals have an internal, hexadecimal slave address of A0. (The EEPROM takes up the entire address range, making this situation impossible to avoid.) The analog switch connects either one device or the other. Selection involves the data line (SDA) only because an I²C start condition requires that the SDA signal go low before the clock goes low. To select between the devices, the master device sets a port pin to control the state of the dual SPST analog switch.

The MAX4733 is a dual, single-pole/single-throw (SPST), CMOS analog switch well suited to this function. Its normally open switch and normally closed switch perform the 2:1 selector operation with no additional inverters or port lines. It features low on-resistance and low quiescent supply current (1µA, max), and is specified for operation down to 2V. It is available in three packages: an 8-pin µMAX^®, 8-pin TDFN-EP, and a 9-bump chip-scale package (UCSP™).