Minimizing Shutdown Current in the MAX9877 Audio Subsystem IC

Introduction

In any typical application, devices connected to an I²C bus expect both the SDA and SCL lines to idle in a logic-high state. The MAX9877 audio subsystem IC was designed with this expectation and, as a result, relies upon logic-high at both SDA and SCL in order to achieve the minimum shutdown supply current. This article describes three methods that can be used to attain minimum shutdown current in systems where SDA and SCL may be set to a logic-low when the MAX9877 is placed in shutdown.

Method 1—Additional Weak Pullup

The first method uses an additional weak voltage divider for each SDA and SCL to set the voltage on the lines when the normal pullup resistors are not active. Figure 1 shows the schematic for this method.

The pair of 2MΩ resistors on SDA and SCL divides down the battery voltage so that the voltage of SDA and SCL does not exceed the maximum rating of the I²C master. For a battery voltage that ranges from 4.2V to 3.2V, the voltage on SDA and SCL is set between 2.1V and 1.6V, which is sufficient to exceed the input-high voltage of the MAX9877.

The diode prevents the disabled V_DDIO power supply from consuming current if its output is forced to ground. If the power supply has a high-impedance output when disabled, then the diode can be omitted.

This method also assumes that the output of the I²C master and all other devices on the bus are high impedance when in shutdown. One reason that this assumption may not be correct is if the I²C master's power supply has been removed and the output is clamped to the now 0V supply voltage by the integrated ESD protection. This is not typically the case but, if it is, then Method 2 or 3 must be used to allow SDA and SCL to be pulled high.

Method 2—Level Translator

If the other devices on the bus cannot be trusted to be high impedance when the system interface is shut down, a single n-channel enhancement MOSFET can be used to isolate each bus line from the rest of the system. Additional pullup resistors can then be added to set the logic level high on the MAX9877 side of the bus.

Figure 2 shows how to implement this method. V_DDIO is again the system's I²C pullup voltage. All four resistors should be selected based on the I²C timing requirements of the system. The n-channel MOSFET serves as a bidirectional level translator, which allows the logic level to be different for the MAX9877 and the baseband without interfering with normal operation. When the V_DDIO power supply is disabled, the level translator allows the SDA and SCL pins of the MAX9877 to remain high, thus minimizing shutdown current.

Method 3—High-Side Power Switch

The final solution to minimizing the shutdown current of the MAX9877 is to place a high-side switch in series with the MAX9877 power supply. This allows the power supply to be completely disconnected from the battery when required and reduces the shutdown current of the MAX9877 to less than 1µA.

Figure 3 shows how to connect the high-side switch to the MAX9877. The MAX9877 has two power supply pins (V_DD and PV_DD) that must be kept within 0.3V of each other at all times. A single power switch is used to keep the supplies at the same voltage and to minimize component count.